| /Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
18 4. Hardware version 1
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
24 5.2 Native absolute mode 6 byte packet format
25 5.2.1 Parity checking and packet re-synchronization
28 6. Hardware version 3
30 6.2 Native absolute mode 6 byte packet format
33 7. Hardware version 4
35 7.2 Native absolute mode 6 byte packet format
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| D | sentelic.rst | 8 :Copyright: |copy| 2002-2011 Sentelic Corporation.
10 :Last update: Dec-07-2011
12 Finger Sensing Pad Intellimouse Mode (scrolling wheel, 4th and 5th buttons)
15 A) MSID 4: Scrolling wheel mode plus Forward page(4th button) and Backward
21 4. Issuing the "Get device ID" command (0xF2) and waits for the response;
27 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
28 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
29 1 |Y|X|y|x|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 | | |B|F|W|W|W|W|
30 |---------------| |---------------| |---------------| |---------------|
40 Byte 2: X Movement(9-bit 2's complement integers)
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| /Documentation/translations/zh_CN/core-api/ |
| D | packing.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/core-api/packing.rst
22 --------
42 --------
46 - 将一个CPU可使用的数字打包到内存缓冲区中（具有硬件约束/特殊性）。
47 - 将内存缓冲区（具有硬件约束/特殊性）解压缩为一个CPU可使用的数字。
62 7 6 5 4
63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
76 7 6 5 4
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| /Documentation/hwmon/ |
| D | lt7182s.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 Addresses scanned: -
16 Author: Guenter Roeck <linux@roeck-us.net>
20 -----------
22 LT7182S is a Dual Channel 6A, 20V PolyPhase Step-Down Silent Switcher with
27 -----------
33 at address 0x4f on I2C bus #4::
36 # echo lt7182s 0x4f > /sys/bus/i2c/devices/i2c-4/new_device
42 ----------------
45 curr[1-2]_label "iin[12]"
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| D | max31785.rst | 10 Addresses scanned: -
17 -----------
19 The Maxim MAX31785 is a PMBus device providing closed-loop, multi-channel fan
24 For dual-rotor configurations the MAX31785A exposes the second rotor tachometer
25 readings in attributes fan[5-8]_input. By contrast the MAX31785 only exposes
26 the slowest rotor measurement, and does so in the fan[1-4]_input attributes.
29 -----------
35 ----------------
38 fan[1-4]_alarm Fan alarm.
39 fan[1-4]_fault Fan fault.
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| D | w83793.rst | 10 Addresses scanned: I2C 0x2c - 0x2f
15 - Yuan Mu (Winbond Electronics)
16 - Rudolf Marek <r.marek@assembler.cz>
20 -----------------
36 -----------
42 6 remote temperatures, up to 8 sets of PWM fan controls, SmartFan
44 sets of 6-pin CPU VID input.
48 voltage0-2 is 2mV, resolution of voltage3/4/5 is 16mV, 8mV for voltage6,
49 24mV for voltage7/8. Temp1-4 have a 0.25 degree Celsius resolution,
50 temp5-6 have a 1 degree Celsiis resolution.
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| /Documentation/driver-api/media/drivers/ |
| D | sh_mobile_ceu_camera.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 -----------
12 host scales: -"- host driver
17 ---------------------------------
19 .. code-block:: none
21 -1--
23 -2-- -\
24 | --\
25 | --\
26 +-5-- . -- -3-- -\
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,vf610-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,vf610-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 such as pull-up, speed, ode for this pin. Please refer to Vybrid VF610
22 PAD_CTL_DSE_DISABLE (0 << 6)
23 PAD_CTL_DSE_150ohm (1 << 6)
24 PAD_CTL_DSE_75ohm (2 << 6)
25 PAD_CTL_DSE_50ohm (3 << 6)
26 PAD_CTL_DSE_37ohm (4 << 6)
27 PAD_CTL_DSE_30ohm (5 << 6)
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| /Documentation/core-api/ |
| D | packing.rst | 6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
56 7 6 5 4
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| /Documentation/userspace-api/media/v4l/ |
| D | subdev-formats.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
23 - ``height``
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| D | pixfmt-packed-hsv.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _packed-hsv:
13 depends on the hsv-encoding used, see :ref:`colorspaces`.
29 .. _packed-hsv-formats:
31 .. flat-table:: Packed HSV Image Formats
32 :header-rows: 2
33 :stub-columns: 0
35 * - Identifier
36 - Code
37 -
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| D | pixfmt-srggb10-ipu3.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
21 to 32 bytes leaving 6 most significant bits padding in the last byte.
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
38 * - start + 0:
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| D | pixfmt-rgb.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
56 noted by the presence of bit 31 in the 4CC value), and on the number of bits
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| /Documentation/gpu/amdgpu/ |
| D | apu-asic-info-table.csv | 2 Radeon R* Graphics, CARRIZO/STONEY, DCE 11, 8, VCE 3 / UVD 6, 3, n/a
7 Ryzen 5000 series / Ryzen 7x30 series, GREEN SARDINE / Cezanne / Barcelo / Barcelo-R, DCN 2.1, 9.3,…
8 Ryzen 6000 series / Ryzen 7x35 series / Ryzen 7x36 series, YELLOW CARP / Rembrandt / Rembrandt-R, 3…
9 Ryzen 7000 series (AM5), Raphael, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5
10 Ryzen 9000 series (AM5), Granite Ridge, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5
11 Ryzen 7x45 series (FL1), Dragon Range, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5
12 Ryzen 7x20 series, Mendocino, 3.1.6, 10.3.7, 3.1.1, 5.2.7, 13.0.8
13 Ryzen 7x40 series, Phoenix, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11
14 Ryzen 8x40 series, Hawk Point, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11
|
| /Documentation/RCU/Design/Expedited-Grace-Periods/ |
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16 inkscape:version="0.48.4 r9939"
29 style="fill-rule:evenodd;stroke-width:0.625;stroke-linejoin:round"
30 …d="M 8.7185878,4.0337352 -2.2072895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354…
31 transform="matrix(-1.1,0,0,-1.1,-1.1,0)"
32 inkscape:connector-curvature="0" />
43 style="fill-rule:evenodd;stroke-width:0.625;stroke-linejoin:round"
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16 inkscape:version="0.48.4 r9939"
29 style="fill-rule:evenodd;stroke-width:0.625;stroke-linejoin:round"
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| /Documentation/networking/ |
| D | ieee802154.rst | 2 IEEE 802.15.4 Developer's Guide
7 The IEEE 802.15.4 working group focuses on standardization of the bottom
11 - ZigBee - proprietary protocol from the ZigBee Alliance
12 - 6LoWPAN - IPv6 networking over low rate personal area networks
14 The goal of the Linux-wpan is to provide a complete implementation
15 of the IEEE 802.15.4 and 6LoWPAN protocols. IEEE 802.15.4 is a stack
16 of protocols for organizing Low-Rate Wireless Personal Area Networks.
20 - IEEE 802.15.4 layer; We have chosen to use plain Berkeley socket API,
21 the generic Linux networking stack to transfer IEEE 802.15.4 data
23 - MAC - provides access to shared channel and reliable data delivery
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| /Documentation/devicetree/bindings/iio/amplifiers/ |
| D | adi,hmc425a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 ADRF5750 2 dB LSB, 4-Bit, Silicon Digital Attenuator, 10 MHz to 60 GHz
16 https://www.analog.com/media/en/technical-documentation/data-sheets/adrf5740.pdf
18 HMC425A 0.5 dB LSB GaAs MMIC 6-BIT DIGITAL POSITIVE CONTROL ATTENUATOR, 2.2 - 8.0 GHz
19 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc425A.pdf
21 HMC540S 1 dB LSB Silicon MMIC 4-Bit Digital Positive Control Attenuator, 0.1 - 8 GHz
22 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc540s.pdf
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| /Documentation/ABI/testing/ |
| D | debugfs-driver-qat_telemetry | 4 Contact: qat-linux@intel.com
11 * 2, 3, 4: enable telemetry and calculate minimum, maximum
12 and average for each counter over 2, 3 or 4 samples
16 * 1-4: telemetry is enabled and running
28 echo 3 > /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/control
33 echo 0 > /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/control
40 Contact: qat-linux@intel.com
88 cat /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/device_data
95 If ``control`` is 2, 3 or 4, counters are displayed in the
108 Contact: qat-linux@intel.com
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