Searched +full:4 +full:- +full:wire (Results 1 – 25 of 82) sorted by relevance
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| /Documentation/devicetree/bindings/iio/temperature/ |
| D | maxim,max31865.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Navin Sankar Velliangiri <navin@linumiz.com>
22 maxim,3-wire:
25 enables 3-wire RTD connection. Else 2-wire or 4-wire RTD connection.
28 spi-cpha: true
31 - compatible
32 - reg
33 - spi-cpha
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ti,am3359-tsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/touchscreen/ti,am3359-tsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
14 const: ti,am3359-tsc
17 description: Wires refer to application modes i.e. 4/5/8 wire touchscreen
20 enum: [4, 5, 8]
22 ti,x-plate-resistance:
26 ti,coordinate-readouts:
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| /Documentation/iio/ |
| D | ad4000.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
30 ------------------
35 CS mode, 3-wire turbo mode
38 Datasheet "3-wire" mode is what most resembles standard SPI connection which,
41 "CS Mode, 3-Wire Turbo Mode" connection in datasheets.
42 NOTE: The datasheet definition of 3-wire mode for the AD4000 series is NOT the
43 same of standard spi-3wire mode.
47 Omit the ``adi,sdi-pin`` property in device tree to select this mode.
51 +-------------+
52 + ----------------------------------| SDO |
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| /Documentation/sound/soc/ |
| D | dai.rst | 12 AC97 is a five wire interface commonly found on many PC sound cards. It is
26 I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
35 I2S has several different operating modes:-
50 PCM is another 4 wire interface, very similar to I2S, which can support a more
58 Common PCM operating modes:-
|
| /Documentation/devicetree/bindings/display/ |
| D | multi-inno,mi0283qt.txt | 1 Multi-Inno MI0283QT display panel
4 - compatible: "multi-inno,mi0283qt".
7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
10 - dc-gpios: D/C pin. The presence/absence of this GPIO determines
12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
14 - reset-gpios: Reset pin
15 - power-supply: A regulator node for the supply voltage.
16 - backlight: phandle of the backlight device attached to the panel
17 - rotation: panel rotation in degrees counter clockwise (0,90,180,270)
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| D | solomon,ssd-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/solomon,ssd-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Javier Martinez Canillas <javierm@redhat.com>
16 reset-gpios:
20 dc-gpios:
23 that is needed for 4-wire SPI to tell the controller if the
31 The default value is controller-dependent.
37 The default value is controller-dependent.
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| /Documentation/devicetree/bindings/clock/ |
| D | ti,lmk04832.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Beguin <liambeguin@gmail.com>
21 - ti,lmk04832
26 '#address-cells':
29 '#size-cells':
32 '#clock-cells':
35 spi-max-frequency:
40 - description: PLL2 reference clock.
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7944.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of pin-compatible single channel differential analog to digital
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad7944
27 - adi,ad7985
28 - adi,ad7986
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| /Documentation/devicetree/bindings/sound/ |
| D | mt6359.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eason Yen <eason.yen@mediatek.com>
11 - Jiaxin Yu <jiaxin.yu@mediatek.com>
12 - Shane Chien <shane.chien@mediatek.com>
20 mediatek,dmic-mode:
24 signal. 0 means two wires, 1 means one wire. Default value is 0.
26 - 0 # two wires
27 - 1 # one wire
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| /Documentation/devicetree/bindings/iio/addac/ |
| D | adi,ad74115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74115H is a single-channel software configurable input/output
17 chip solution with an SPI interface. The device features a 16-bit ADC and a
18 14-bit DAC.
25 - adi,ad74115h
30 spi-max-frequency:
33 spi-cpol: true
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| /Documentation/hwmon/ |
| D | adt7411.rst | 17 -----------
22 The ADT7411 can use an I2C/SMBus compatible 2-wire interface or an
23 SPI-compatible 4-wire interface. It provides a 10-bit analog to digital
26 loses 2 inputs then). There are high- and low-limit registers for all inputs.
30 sysfs-Interface
31 ---------------
35 in[1-8]_input analog 1-8 input
48 -----
|
| D | asc7621.rst | 20 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as
21 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has
22 added PECI and a 4th thermal zone. The Andigilog aSC7611 is the
23 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in
28 have used registers below 20h for vendor-specific functions in addition
29 to those in the Intel-specified vendor range.
32 The fan speed control uses this finer value to produce a "step-less" fan
33 PWM output. These two bytes are "read-locked" to guarantee that once a
34 high or low byte is read, the other byte is locked-in until after the
37 sheet says 10-bits of resolution, although you may find the lower bits
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| D | lm85.rst | 79 - Philip Pokorny <ppokorny@penguincomputing.com>,
80 - Frodo Looijaard <frodol@dds.nl>,
81 - Richard Barrington <rich_b_nz@clear.net.nz>,
82 - Margit Schubert-While <margitsw@t-online.de>,
83 - Justin Thiessen <jthiessen@penguincomputing.com>
86 -----------
92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
94 temperatures and five (5) voltages. It has four (4) 16-bit counters for
106 measure a thermal diode like the one in a Pentium 4 processor in a socket
127 ----------------
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-octeon.txt | 1 * Two Wire Serial Interface (TWSI) / I2C
3 - compatible: "cavium,octeon-3860-twsi"
9 compatible: "cavium,octeon-7890-twsi"
13 - reg: The base address of the TWSI/I2C bus controller register bank.
15 - #address-cells: Must be <1>.
17 - #size-cells: Must be <0>. I2C addresses have no size component.
19 - interrupts: A single interrupt specifier.
21 - clock-frequency: The I2C bus clock rate in Hz.
25 #address-cells = <1>;
26 #size-cells = <0>;
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| /Documentation/spi/ |
| D | spi-lm70llp.rst | 2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
15 -----------
27 --------------------
28 The schematic for this particular board (the LM70EVAL-LLP) is
29 available (on page 4) here:
39 D0 2 - -
40 D1 3 --> V+ 5
41 D2 4 --> V+ 5
42 D3 5 --> V+ 5
43 D4 6 --> V+ 5
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| /Documentation/devicetree/bindings/net/bluetooth/ |
| D | amlogic,w155s2-bt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/bluetooth/amlogic,w155s2-bt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 The W155S2 is an Amlogic Bluetooth and Wi-Fi combo chip. It works on
12 the standard H4 protocol via a 4-wire UART interface, with baud rates
13 up to 4 Mbps.
16 - Yang Li <yang.li@amlogic.com>
21 - items:
22 - enum:
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| D | nxp,88w8987-bt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/nxp,88w8987-bt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This binding describes UART-attached NXP bluetooth chips. These chips
11 are dual-radio chips supporting WiFi and Bluetooth. The bluetooth
12 works on standard H4 protocol over 4-wire UART. The RTS and CTS lines
14 asserts break signal over UART-TX line to put the chip into power save
15 state. De-asserting break wakes up the BT chip.
18 - Neeraj Sanjay Kale <neeraj.sanjaykale@nxp.com>
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-mipi-dbi-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Noralf Trønnes <noralf@tronnes.org>
18 phones. The standard defines 4 display architecture types and this binding is
23 - Power:
24 - Vdd: Power supply for display module
25 Called power-supply in this binding.
26 - Vddi: Logic level supply for interface signals
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
32 increased automatically with max(cs-gpios, hardware chip selects).
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| D | cdns,xspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2020-21 Cadence
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Parshuram Thombare <pthombar@cadence.com>
15 single, dual, quad or octal wire transmission modes for
16 read/write access to slaves such as SPI-NOR flash.
21 - cdns,xspi-nor
22 - marvell,cn10-xspi-nor
26 - description: address and length of the controller register set
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| /Documentation/filesystems/nfs/ |
| D | localio.rst | 26 But unlike the LOCALIO protocol, the sockaddr-based matching didn't
42 - With LOCALIO:
43 4K read: IOPS=979k, BW=3825MiB/s (4011MB/s)(74.7GiB/20002msec)
44 4K write: IOPS=165k, BW=646MiB/s (678MB/s)(12.6GiB/20002msec)
48 - Without LOCALIO:
49 4K read: IOPS=79.2k, BW=309MiB/s (324MB/s)(6188MiB/20003msec)
50 4K write: IOPS=59.8k, BW=234MiB/s (245MB/s)(4671MiB/20002msec)
55 - With LOCALIO:
56 4K read: IOPS=230k, BW=898MiB/s (941MB/s)(17.5GiB/20001msec)
57 4K write: IOPS=22.6k, BW=88.3MiB/s (92.6MB/s)(1766MiB/20001msec)
[all …]
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | dongwoon,dw9768.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dongchun Zhu <dongchun.zhu@mediatek.com>
13 description: |-
14 The Dongwoon DW9768 is a single 10-bit digital-to-analog (DAC) converter
16 a linear mode driver. The DAC is controlled via a 2-wire (I2C-compatible)
24 - dongwoon,dw9768 # for DW9768 VCM
25 - giantec,gt9769 # for GT9769 VCM
30 vin-supply:
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| D | ovti,ov8856.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sakari Ailus <sakari.ailus@linux.intel.com>
13 description: |-
14 The Omnivision OV8856 is a high performance, 1/4-inch, 8 megapixel, CMOS
15 image sensor that delivers 3264x2448 at 30fps. It provides full-frame,
16 sub-sampled, and windowed 10-bit MIPI images in various formats via the
18 through I2C and two-wire SCCB. The sensor output is available via CSI-2
19 serial data output (up to 4-lane).
[all …]
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| D | sony,imx290.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sony IMX290 1/2.8-Inch CMOS Image Sensor
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 description: |-
14 The Sony IMX290 is a 1/2.8-Inch CMOS Solid-state image sensor with Square
16 through I2C and 4-wire interfaces.
19 LVDS DDR output and CSI-2 serial data output. The CSI-2 bus is the default.
[all …]
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| /Documentation/devicetree/bindings/net/ |
| D | adi,adin1110.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ADI ADIN1110 MAC-PHY
10 - Alexandru Tachici <alexandru.tachici@analog.com>
13 The ADIN1110 is a low power single port 10BASE-T1L MAC-
18 The ADIN2111 is a low power, low complexity, two-Ethernet ports
19 switch with integrated 10BASE-T1L PHYs and one serial peripheral
22 with the IEEE 802.3cg-2019 Ethernet standard for long reach
25 The device has a 4-wire SPI interface for communication
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