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/Documentation/core-api/
Dpacking.rst6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
15 definitions from the hardware documentation into bit field indices for the
18 (sometimes even 64 bit ones). This creates the inconvenience of having to
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
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/Documentation/devicetree/bindings/ufs/
Dsnps,tc-dwc-g210.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/snps,tc-dwc-g210.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Wei <liwei213@huawei.com>
18 - snps,dwc-ufshcd-1.40a
20 - compatible
23 - $ref: ufs-common.yaml
28 - enum:
29 - snps,g210-tc-6.00-20bit
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/Documentation/arch/powerpc/
Dassociativity.rst9 are represented as being members of a sub-grouping domain. This performance
17 Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property".
18 Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1.
20 bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
23 ------
27 ------
28 With Form 1 a combination of ibm,associativity-reference-points, and ibm,associativity
34 The “ibm,associativity-reference-points” property contains a list of one or more numbers
43 if they belong to the same higher-level domains. For mismatch at every higher
48 -------
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Delf_hwcaps.rst11 ---------------
46 -------------
56 -------------
65 -------------------
67 HWCAPs are allocated as described in Power Architecture 64-Bit ELF V2 ABI
71 ---------------------------------
74 32-bit CPU
77 64-bit CPU (userspace may be running in 32-bit mode).
93 The processor is 40x or 44x family.
94 Unused in the kernel since 732b32daef80 ("powerpc: Remove core support for 40x")
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/Documentation/filesystems/ext4/
Dinodes.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -----------
11 that file. ext4 appears to cheat (for performance reasons) a little bit
15 links and is in general more seek-happy than ext4 due to its simpler
22 ``(inode_number - 1) / sb.s_inodes_per_group``, and the offset into the
23 group's table is ``(inode_number - 1) % sb.s_inodes_per_group``. There
31 .. list-table::
32 :widths: 8 8 24 40
33 :header-rows: 1
36 * - Offset
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Djournal.rst1 .. SPDX-License-Identifier: GPL-2.0
4 --------------
10 “important” data writes on-disk as quickly as possible. Once the important
15 read-write-erases) before erasing the commit record. Should the system
48 All fields in jbd2 are written to disk in big-endian order. This is the
61 .. list-table::
63 :header-rows: 1
65 * - Superblock
66 - descriptor_block (data_blocks or revocation_block) [more data or
68 - [more transactions...]
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Difork.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ------------------------------
22 means of an (up to) three level 1-1 block map. To find the logical block
70 .. list-table::
71 :widths: 8 8 24 40
72 :header-rows: 1
74 * - Offset
75 - Size
76 - Name
77 - Description
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/Documentation/devicetree/bindings/mtd/
Djedec,spi-nor.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: mtd.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
19 - items:
20 - pattern: "^((((micron|spansion|st),)?\
21 (m25p(40|80|16|32|64|128)|\
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/Documentation/input/devices/
Diforce-protocol.rst7 Home page at `<http://web.archive.org/web/*/http://www.esil.univ-mrs.fr>`_
16 specify force effects to I-Force 2.0 devices. None of this information comes
25 send data to your I-Force device based on what you read in this document.
30 All values are hexadecimal with big-endian encoding (msb on the left). Beware,
31 values inside packets are encoded using little-endian. Bytes whose roles are
35 ------------------------
64 00 X-Axis lsb
65 01 X-Axis msb
66 02 Y-Axis lsb, or gas pedal for a wheel
67 03 Y-Axis msb, or brake pedal for a wheel
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/Documentation/devicetree/bindings/mfd/
Dmax77620.txt4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
21 - system-power-controller: Indicates that this PMIC is controlling the
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/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra186-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 The NVIDIA Tegra186 SoC features a 128 bit memory controller that is split
15 into four 32 bit channels to support LPDDR4 with x16 subpartitions. The MC
16 handles memory requests for 40-bit virtual addresses from internal clients
22 automotive safety applications (single bit error correction and double bit
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/Documentation/devicetree/bindings/display/
Dwm,wm8505-fb.txt2 -----------------------------------------------------
5 - compatible : "wm,wm8505-fb"
6 - reg : Should contain 1 register ranges(address and length)
7 - bits-per-pixel : bit depth of framebuffer (16 or 32)
10 - display-timings: see display-timing.txt for information
15 compatible = "wm,wm8505-fb";
17 bits-per-pixel = <16>;
19 display-timings {
20 native-mode = <&timing0>;
22 clock-frequency = <0>; /* unused but required */
[all …]
Dvia,vt8500-fb.txt2 -----------------------------------------------------
5 - compatible : "via,vt8500-fb"
6 - reg : Should contain 1 register ranges(address and length)
7 - interrupts : framebuffer controller interrupt
8 - bits-per-pixel : bit depth of framebuffer (16 or 32)
11 - display-timings: see display-timing.txt for information
16 compatible = "via,vt8500-fb";
19 bits-per-pixel = <16>;
21 display-timings {
22 native-mode = <&timing0>;
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/Documentation/devicetree/bindings/iio/amplifiers/
Dadi,hmc425a.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 ADRF5750 2 dB LSB, 4-Bit, Silicon Digital Attenuator, 10 MHz to 60 GHz
16 https://www.analog.com/media/en/technical-documentation/data-sheets/adrf5740.pdf
18 HMC425A 0.5 dB LSB GaAs MMIC 6-BIT DIGITAL POSITIVE CONTROL ATTENUATOR, 2.2 - 8.0 GHz
19 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc425A.pdf
21 HMC540S 1 dB LSB Silicon MMIC 4-Bit Digital Positive Control Attenuator, 0.1 - 8 GHz
22 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc540s.pdf
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/Documentation/ABI/testing/
Dsysfs-bus-event_source-devices-dsa5 Description: Read-only. Attribute group to describe the magic bits
8 ABI/testing/sysfs-bus-event_source-devices-format).
10 Each attribute in this group defines a bit range in
15 event_category = "config:0-3" - event category
16 event = "config:4-31" - event ID
18 filter_wq = "config1:0-31" - workqueue filter
19 filter_tc = "config1:32-39" - traffic class filter
20 filter_pgsz = "config1:40-43" - page size filter
21 filter_sz = "config1:44-51" - transfer size filter
22 filter_eng = "config1:52-59" - engine filter
[all …]
/Documentation/staging/
Dcrc32.rst5 A CRC is a long-division remainder. You add the CRC to the message,
11 protocols put the end-of-frame flag after the CRC.
15 - We're working in binary, so the digits are only 0 and 1, and
16 - When dividing polynomials, there are no carries. Rather than add and
17 subtract, we just xor. Thus, we tend to get a bit sloppy about
21 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
22 Since it's 33 bits long, bit 32 is always going to be set, so usually the
23 CRC is written in hex with the most significant bit omitted. (If you're
24 familiar with the IEEE 754 floating-point format, it's the same idea.)
28 the best error-detecting properties, this should correspond to the
[all …]
/Documentation/arch/arm64/
Dmemory.rst12 with the 4KB page configuration, allowing 39-bit (512GB) or 48-bit
14 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
21 TTBRx selection is given by bit 55 of the virtual address. The
23 contains only user (non-global) mappings. The swapper_pg_dir address is
27 AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit)::
30 -----------------------------------------------------------------------
44 AArch64 Linux memory layout with 64KB pages + 3 levels (52-bit with HW support)::
47 -----------------------------------------------------------------------
63 +--------+--------+--------+--------+--------+--------+--------+--------+
64 |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
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/Documentation/devicetree/bindings/dma/stm32/
Dst,stm32-dma3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 described in "#dma-cells" property description below, using a three-cell
26 - Amelie Delaunay <amelie.delaunay@foss.st.com>
29 - $ref: /schemas/dma/dma-controller.yaml#
33 const: st,stm32mp25-dma3
42 Should contain all of the per-channel DMA interrupts in ascending order
51 power-domains:
[all …]
/Documentation/driver-api/media/drivers/
Dradiotrack.rst1 .. SPDX-License-Identifier: GPL-2.0
11 ----------------
24 ------------------
26 I have a RadioTrack card from back when I ran an MS-Windows platform. After
27 converting to Linux, I found Gideon le Grange's command-line software for
29 comfortable X-windows interface, and added a scanning feature. For hack
32 broadcast TV channels, situated just below and above the 87.0-109.0 MHz range.
40 --------------------
42 The RadioTrack card is an ISA 8-bit FM radio card. The radio frequency (RF)
54 --------------------------------
[all …]
/Documentation/w1/slaves/
Dw1_ds2438.rst16 -----------
19 a battery pack. It also has a 40 bytes of nonvolatile EEPROM.
28 -----
29 This file controls the 'Current A/D Control Bit' (IAD) in the
31 Writing a zero value will clear the IAD bit and disables the current
33 Writing value "1" is setting the IAD bit (enables the measurements).
34 The IAD bit is enabled by default in the DS2438.
36 When writing to sysfs file bits 2-7 are ignored, so it's safe to write ASCII.
40 -------
48 -------
[all …]
/Documentation/arch/x86/
Dentry_64.rst1 .. SPDX-License-Identifier: GPL-2.0
11 https://lore.kernel.org/r/20110529191055.GC9835%40elte.hu
16 for 64-bit, arch/x86/entry/entry_32.S for 32-bit and finally
17 arch/x86/entry/entry_64_compat.S which implements the 32-bit compatibility
18 syscall entry points and thus provides for 32-bit processes the
19 ability to execute syscalls when running on 64-bit kernels.
25 - system_call: syscall instruction from 64-bit code.
27 - entry_INT80_compat: int 0x80 from 32-bit or 64-bit code; compat syscall
30 - entry_INT80_compat, ia32_sysenter: syscall and sysenter from 32-bit
33 - interrupt: An array of entries. Every IDT vector that doesn't
[all …]
/Documentation/devicetree/bindings/iio/adc/
Drichtek,rtq6056.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RTQ6056 Bi-Directional Current and Power Monitor with 16-bit ADC
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RTQ6056 is a high accuracy current-sense monitor with I2C and SMBus
19 internal analog-to-digital converter ADC. The programmable calibration,
24 https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf
29 - enum:
30 - richtek,rtq6056
[all …]
/Documentation/devicetree/bindings/auxdisplay/
Dhit,hd44780.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert@linux-m68k.org>
15 interface, which can be used in either 4-bit or 8-bit mode. By using a
24 data-gpios:
26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface.
29 - maxItems: 4
30 - maxItems: 8
[all …]
/Documentation/scsi/
Daic7xxx.rst1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0
26 aic7770 10 EISA/VL 10MHz 16Bit 4 1
27 aic7850 10 PCI/32 10MHz 8Bit 3
28 aic7855 10 PCI/32 10MHz 8Bit 3
29 aic7856 10 PCI/32 10MHz 8Bit 3
30 aic7859 10 PCI/32 20MHz 8Bit 3
31 aic7860 10 PCI/32 20MHz 8Bit 3
32 aic7870 10 PCI/32 10MHz 16Bit 16
33 aic7880 10 PCI/32 20MHz 16Bit 16
[all …]
/Documentation/virt/kvm/devices/
Darm-vgic-v3.rst1 .. SPDX-License-Identifier: GPL-2.0
9 - KVM_DEV_TYPE_ARM_VGIC_V3 ARM Generic Interrupt Controller v3.0
12 will act as the VM interrupt controller, requiring emulated user-space devices
23 KVM_VGIC_V3_ADDR_TYPE_DIST (rw, 64-bit)
28 KVM_VGIC_V3_ADDR_TYPE_REDIST (rw, 64-bit)
35 KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION (rw, 64-bit)
38 bits: | 63 .... 52 | 51 .... 16 | 15 - 12 |11 - 0
41 - index encodes the unique redistributor region index
42 - flags: reserved for future use, currently 0
43 - base field encodes bits [51:16] of the guest physical base address
[all …]

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