Searched +full:41 +full:a (Results 1 – 25 of 122) sorted by relevance
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| /Documentation/core-api/ |
| D | packing.rst | 10 One can memory-map a pointer to a carefully crafted struct over the hardware
20 A more robust alternative to struct field definitions would be to extract the
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
47 The following examples cover the memory layout of a packed u64 field.
55 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
71 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
77 inverts bit offsets inside a byte.
84 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
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| /Documentation/devicetree/bindings/timer/ |
| D | nvidia,tegra-timer.yaml | 21 # Either a single combined interrupt or up to 14 individual interrupts
25 A list of 14 interrupts; one per each timer channels 0 through 13
43 # Either a single combined interrupt or up to 6 individual interrupts
47 A list of 6 interrupts; one per each of timer channels 1 through 5,
57 # Either a single combined interrupt or up to 4 individual interrupts
61 A list of 4 interrupts; one per timer channel.
69 timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived
83 The Tegra30 timer provides ten 29-bit timer channels, a single 32-bit free
85 trigger a legacy watchdog reset.
88 The Tegra20 timer provides four 29-bit timer channels and a single 32-bit free
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| /Documentation/devicetree/bindings/pwm/ |
| D | nxp,pca9685-pwm.txt | 6 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
21 pca: pca@41 {
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-adnp.txt | 10 - gpio-controller: Marks the device as a GPIO controller
19 gpioext: gpio-controller@41 {
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-xilinx.yaml | 18 - xlnx,xps-spi-2.00.a
20 - xlnx,axi-quad-spi-1.00.a
47 spi0: spi@41e00000 {
48 compatible = "xlnx,xps-spi-2.00.a";
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| /Documentation/devicetree/bindings/virtio/ |
| D | mmio.yaml | 29 description: Required when the node corresponds to a virtio-iommu device.
38 description: Required for setting irq of a virtio_mmio device as wakeup source.
53 interrupts = <41>;
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| /Documentation/devicetree/bindings/input/ |
| D | ilitek,ili2901.yaml | 14 This touchscreen controller uses the i2c-hid protocol with a reset GPIO.
56 touchscreen@41 {
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| D | ilitek,ili9882t.yaml | 14 This touchscreen controller uses the i2c-hid protocol with a reset GPIO.
56 touchscreen: touchscreen@41 {
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| D | microchip,qt1050.txt | 3 The AT42QT1050 (QT1050) is a QTouchADC sensor device. The device can sense from
5 functions necessary to provide stable sensing under a wide variety of changing
17 - wakeup-source: touch keys can be used as a wakeup source
19 Each button (key) is represented as a sub-node:
30 If a optional property is missing or has a invalid value the default value is
36 Valid value range: 0 - 637500; values must be a multiple of 2500;
45 Number of counts to register a touch detection.
51 touchkeys@41 {
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| /Documentation/devicetree/bindings/clock/ |
| D | imx23-clock.yaml | 14 ID in its "clocks" phandle cell. The following is a full list of i.MX23
60 usb_phy 41
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| D | imx31-clock.yaml | 14 ID in its "clocks" phandle cell. The following is a full list of i.MX31
60 wdog_gate 41
88 interrupt for DVFS when a frequency change is requested, request 2 is
89 to generate interrupt for DPTC when a voltage change is requested.
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| D | imx28-clock.yaml | 14 ID in its "clocks" phandle cell. The following is a full list of i.MX28
60 lradc 41
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| D | imx35-clock.yaml | 14 ID in its "clocks" phandle cell. The following is a full list of i.MX35
60 epit2_gate 41
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| D | imx25-clock.yaml | 14 ID in its "clocks" phandle cell. The following is a full list of i.MX25
60 per15 41
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| /Documentation/networking/ |
| D | multi-pf-netdev.rst | 22 The Multi-PF NIC technology enables several CPUs within a multi-socket server to connect directly to
23 the network, each through its own dedicated PCIe interface. Through either a connection harness that
24 splits the PCIe lanes between two cards or by bifurcating a PCIe slot for a single card. This
32 The feature adds support for combining multiple PFs of the same port in a Multi-PF environment under
36 traffic and allows apps running on the same netdev from different NUMAs to still feel a sense of
43 NIC and has the socket-direct property enabled, once all PFs are probed, we create a single netdev
46 The netdev network channels are distributed between all devices, a proper configuration would utili…
47 the correct close NUMA node when working on a certain app/CPU.
49 We pick one PF to be a primary (leader), and it fills a special role. The other devices
51 mode, no south <-> north traffic flowing directly through a secondary PF. It needs the assistance of
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| /Documentation/devicetree/bindings/misc/ |
| D | fsl,qoriq-mc.yaml | 13 The Freescale Management Complex (fsl-mc) is a hardware resource
25 As described in the above overview, all DPAA2 objects in a DPRC share the
26 same hardware "isolation context" and a 10-bit value called an ICID
32 the set of possible ICIDs under a root DPRC and how they map to
56 Must be "fsl,qoriq-mc". A Freescale Management Complex
70 as in the device tree presented to a virtual machine.
74 A standard property. Defines the mapping between the child
104 Maps an ICID to a GIC ITS and associated msi-specifier
143 '^ethernet@[a-f0-9]+$':
171 iommu-map = <23 &smmu 23 41>;
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-dpi.yaml | 18 Shall contain a panel specific compatible and "panel-dpi"
59 hsync-len = <41>;
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ilitek_ts_i2c.yaml | 43 description: touchscreen can be used as a wakeup source.
66 touchscreen@41 {
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| /Documentation/tools/rtla/ |
| D | rtla-timerlat-top.rst | 19 The **rtla timerlat top** displays a summary of the periodic output
46 automatic trace mode, instructing the tracer to stop if a *40 us* latency or
49 # timerlat -a 40 -c 1-23 -q
75 23 #12320 | 28 0 1 28 | 41 3 11 41
115 syscall in a btrfs file system.
121 priority *FIFO:95* by default, which is a common priority used by real-time
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| /Documentation/input/devices/ |
| D | iforce-protocol.rst | 19 This is not a reference. Comments and corrections are welcome. To contact me,
34 General form of a packet
62 OP= 01 for a joystick, 03 for a wheel
66 02 Y-Axis lsb, or gas pedal for a wheel
67 03 Y-Axis msb, or brake pedal for a wheel
97 be assigned a channel)
106 Val 41 Friction (Force = f(velocity)) and Inertia
112 Val 4 = X axis only. Byte 05 must contain 5a
126 0a-0b Address of attack and fade parameters, or ffff if none.
130 0a-0b Address of interactive parameters for Y-axis,
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| /Documentation/devicetree/bindings/mfd/ |
| D | delta,tn48m-cpld.yaml | 19 It is also being used as a GPIO expander and reset controller
44 "^gpio(@[0-9a-f]+)?$":
58 cpld@41 {
71 gpio@3a {
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| /Documentation/devicetree/bindings/reset/ |
| D | nxp,lpc1850-rgu.txt | 29 25 Flash bank A
42 41 ADC1
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| /Documentation/devicetree/bindings/sound/ |
| D | ti,tas2770.yaml | 14 The TAS2770 is a mono, digital input Class-D audio amplifier optimized for
60 # The codec has a single DAI, the #sound-dai-cells=<1>; case is left in for backward
76 codec: codec@41 {
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| /Documentation/hwmon/ |
| D | w83795.rst | 30 Here is a summary of the pin mapping for the W83795G and W83795ADG.
75 41 FANCTL1 10h (bank 2) pwm1
124 41 FANIN8 35h fan8
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | st,stm32-exti.yaml | 37 Reference to a phandle of a hardware spinlock provider node.
113 interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;
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