Searched +full:5 +full:- +full:byte (Results 1 – 25 of 238) sorted by relevance
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| /Documentation/input/devices/ |
| D | alps.rst | 1 ----------------------
3 ----------------------
6 ------------
8 ALPS touchpads, called versions 1, 2, 3, 4, 5, 6, 7 and 8.
10 Since roughly mid-2010 several new ALPS touchpads have been released and
14 adequate. The design choices were to re-define the alps_model_data
29 ---------
32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
37 report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
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| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
22 5. Hardware version 2
24 5.2 Native absolute mode 6 byte packet format
25 5.2.1 Parity checking and packet re-synchronization
30 6.2 Native absolute mode 6 byte packet format
35 7.2 Native absolute mode 6 byte packet format
41 8.2 Native relative mode 6 byte packet format
58 4 allows tracking up to 5 fingers.
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| D | sentelic.rst | 8 :Copyright: |copy| 2002-2011 Sentelic Corporation.
10 :Last update: Dec-07-2011
12 Finger Sensing Pad Intellimouse Mode (scrolling wheel, 4th and 5th buttons)
16 page (5th button)
22 5. FSP will respond 0x04.
27 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
28 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
30 |---------------| |---------------| |---------------| |---------------|
32 Byte 1: Bit7 => Y overflow
40 Byte 2: X Movement(9-bit 2's complement integers)
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| /Documentation/core-api/ |
| D | packing.rst | 6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
44 perspective, bit 63 always means bit offset 7 of byte 7, albeit only
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| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-sdr-pcu16be.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-SDR-FMT-PCU16BE:
9 Planar complex unsigned 16-bit big endian IQ sample
15 number consist of two parts called In-phase and Quadrature (IQ). Both I
23 **Byte Order.**
24 Each cell is one byte.
26 .. flat-table::
27 :header-rows: 1
28 :stub-columns: 0
30 * - Offset:
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| D | pixfmt-sdr-pcu18be.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-SDR-FMT-PCU18BE:
9 Planar complex unsigned 18-bit big endian IQ sample
15 number consist of two parts called In-phase and Quadrature (IQ). Both I
23 **Byte Order.**
24 Each cell is one byte.
26 .. flat-table::
27 :header-rows: 1
28 :stub-columns: 0
30 * - Offset:
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| D | pixfmt-packed-yuv.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _packed-yuv:
15 - In all the tables that follow, bit 7 is the most significant bit in a byte.
16 - 'Y', 'Cb' and 'Cr' denote bits of the luma, blue chroma (also known as
30 seen in a 16-bit word, which is then stored in memory in little endian byte
32 format stores a pixel in a 16-bit word [15:0] laid out at as [Y'\ :sub:`4-0`
33 Cb\ :sub:`5-0` Cr\ :sub:`4-0`], and stored in memory in two bytes,
34 [Cb\ :sub:`2-0` Cr\ :sub:`4-0`] followed by [Y'\ :sub:`4-0` Cb\ :sub:`5-3`].
44 .. flat-table:: Packed YUV 4:4:4 Image Formats (less than 8bpc)
45 :header-rows: 2
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| D | pixfmt-yuv-luma.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _yuv-luma-only:
6 Luma-Only Formats
14 - In all the tables that follow, bit 7 is the most significant bit in a byte.
15 - Formats are described with the minimum number of pixels needed to create a
16 byte-aligned repeating pattern. `...` indicates repetition of the pattern.
17 - Y'\ :sub:`x`\ [9:2] denotes bits 9 to 2 of the Y' value for pixel at column
19 - `0` denotes padding bits set to 0.
28 .. flat-table:: Luma-Only Image Formats
29 :header-rows: 1
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| D | pixfmt-rgb.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
12 bits required to store a pixel is not aligned to a byte boundary, the data is
13 padded with additional bits to fill the remaining byte.
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
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| D | pixfmt-packed-hsv.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _packed-hsv:
13 depends on the hsv-encoding used, see :ref:`colorspaces`.
29 .. _packed-hsv-formats:
31 .. flat-table:: Packed HSV Image Formats
32 :header-rows: 2
33 :stub-columns: 0
35 * - Identifier
36 - Code
37 -
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| D | pixfmt-srggb10p.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10P:
4 .. _v4l2-pix-fmt-sbggr10p:
5 .. _v4l2-pix-fmt-sgbrg10p:
6 .. _v4l2-pix-fmt-sgrbg10p:
16 10-bit packed Bayer formats
23 bits per sample. Every four consecutive samples are packed into 5
25 of the pixels, and the 5th byte contains the 2 least significants
28 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
29 with alternating green-red and green-blue rows. They are conventionally
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| D | metafmt-d4xx.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-meta-fmt-d4xx:
15 Intel D4xx (D435, D455 and others) cameras include per-frame metadata in their UVC
21 and MetadataId_CameraIntrinsics (ID 5). For their description see [1_]. This
37 .. flat-table:: D4xx metadata
39 :header-rows: 1
40 :stub-columns: 0
42 * - **Field**
43 - **Description**
44 * - :cspan:`1` *Depth Control*
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| /Documentation/scsi/ |
| D | arcmsr_spec.rst | 11 ------------
13 - InitThread message and return code
15 2. Doorbell is used for RS-232 emulation
16 ----------------------------------------
35 ---------------------
46 4. RS-232 emulation
47 -------------------
49 Currently 128 byte buffer is used:
52 1st uint32_t Data length (1--124)
53 Byte 4--127 Max 124 bytes of data
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| /Documentation/arch/m68k/ |
| D | buddha-driver.rst | 8 ------------------------------------------------------------------------
11 Buddha-part of the Catweasel Zorro-II version
21 product number: 0 (42 for Catweasel Z-II)
23 Rom-vector: $1000
25 The card should be a Z-II board, size 64K, not for freemem
26 list, Rom-Vektor is valid, no second Autoconfig-board on the
30 as the Amiga Kickstart does: The lower nibble of the 8-Bit
31 address is written to $4a, then the whole Byte is written to
36 otherwise your chance is only 1:16 to find the board :-).
38 The local memory-map is even active when mapped to $e8:
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| /Documentation/staging/ |
| D | lzo.rst | 26 - a distance when copying data from the dictionary (past output buffer)
27 - a length (number of bytes to copy from dictionary)
28 - the number of literals to copy, which is retained in variable "state"
35 The first byte of the block follows a different encoding from other bytes, it
37 prior to that byte.
42 rate of at most 255 per extra byte (thus the compression ratio cannot exceed
45 length = byte & ((1 << #bits) - 1)
47 length = ((1 << #bits) - 1)
49 length += first-non-zero-byte
56 Certain encodings involve one extra byte, others involve two extra bytes
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| D | static-keys.rst | 30 performance-sensitive fast-path kernel code, via a GCC feature and a code
72 gcc (v4.5) adds a new 'asm goto' statement that allows branching to a label:
74 https://gcc.gnu.org/ml/gcc-patches/2009-07/msg01556.html
77 by default, without the need to check memory. Then, at run-time, we can patch
86 consist of a single atomic 'no-op' instruction (5 bytes on x86), in the
87 straight-line code path. When the branch is 'flipped', we will patch the
88 'no-op' in the straight-line codepath with a 'jump' instruction to the
89 out-of-line true branch. Thus, changing branch direction is expensive but
110 allocated at run-time.
186 struct jump_entry table must be at least 4-byte aligned because the
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| /Documentation/devicetree/bindings/mtd/ |
| D | fsmc-nand.txt | 5 - compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand"
6 - reg : Address range of the mtd chip
7 - reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
10 - bank-width : Width (in bytes) of the device. If not present, the width
11 defaults to 1 byte
12 - nand-skip-bbtscan: Indicates the BBT scanning should be skipped
13 - timings: array of 6 bytes for NAND timings. The meanings of these bytes
15 byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits
18 byte 1 TAR : ALE to RE delay, 4 bits are valid. Same format as TCLR.
19 byte 2 THIZ : number of HCLK clock cycles during which the data bus is
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| /Documentation/hwmon/ |
| D | abituguru-datasheet.rst | 14 Olle Sandberg <ollebull@gmail.com>, 2005-05-25
27 Hans de Goede <j.w.r.degoede@hhs.nl>, 28-01-2006
33 As far as known the uGuru is always placed at and using the (ISA) I/O-ports
34 0xE0 and 0xE4, so we don't have to scan any port-range, just check what the two
35 ports are holding for detection. We will refer to 0xE0 as CMD (command-port)
39 present. We have to check for two different values at data-port, because
41 later on attached again data-port will hold 0x08, more about this later.
57 ----------
82 -----------
101 ----------------------------------------------
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| /Documentation/arch/powerpc/ |
| D | associativity.rst | 9 are represented as being members of a sub-grouping domain. This performance
17 Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property".
18 Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1.
20 bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
23 ------
27 ------
28 With Form 1 a combination of ibm,associativity-reference-points, and ibm,associativity
34 The “ibm,associativity-reference-points” property contains a list of one or more numbers
43 if they belong to the same higher-level domains. For mismatch at every higher
48 -------
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| /Documentation/hid/ |
| D | hid-alps.rst | 6 ------------
19 --------------
22 Byte Field Value Notes
42 ---------
45 ReportID-1 (Input Reports) (HIDUsage-Mouse) for TP&SP
46 ReportID-2 (Input Reports) (HIDUsage-keyboard) for TP
47 ReportID-3 (Input Reports) (Vendor Usage: Max 10 finger data) for TP
48 ReportID-4 (Input Reports) (Vendor Usage: ON bit data) for GP
49 ReportID-5 (Feature Reports) Feature Reports
50 ReportID-6 (Input Reports) (Vendor Usage: StickPointer data) for SP
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| /Documentation/devicetree/bindings/dma/stm32/ |
| D | st,stm32-mdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
31 0x0: byte (8bit)
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| /Documentation/arch/sparc/oradax/ |
| D | dax-hv-api.txt | 3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
16 live-migration and other system management activities.
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device
51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility
54 • No-op/Sync
81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility
82 … "ORCL,sun4v-dax-fc" is compatible with the "ORCL,sun4v-dax" interface, and includes additional CCB
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| /Documentation/i2c/busses/ |
| D | i2c-mlxcpld.rst | 2 Driver i2c-mlxcpld
11 - Master mode.
12 - One physical bus.
13 - Polling mode.
20 - Receive Byte/Block.
21 - Send Byte/Block.
22 - Read Byte/Block.
23 - Write Byte/Block.
28 CPBLTY 0x0 - capability reg.
29 Bits [6:5] - transaction length. b01 - 72B is supported,
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| /Documentation/ABI/testing/ |
| D | sysfs-driver-wacom | 4 Contact: linux-bluetooth@vger.kernel.org
14 Contact: linux-input@vger.kernel.org
18 and XL (with LEDs and OLEDs), Intuos 4 WL, Intuos 5 (LEDs only),
25 Contact: linux-input@vger.kernel.org
35 Contact: linux-input@vger.kernel.org
44 Contact: linux-input@vger.kernel.org
48 and Intuos 5) or of the right four (for Cintiq 21UX2 and Cintiq
54 Contact: linux-input@vger.kernel.org
63 Contact: linux-input@vger.kernel.org
70 Contact: linux-input@vger.kernel.org
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| /Documentation/devicetree/bindings/fpga/ |
| D | xlnx,fpga-selectmap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-selectmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Charles Perry <charles.perry@savoirfairelinux.com>
15 the x8 mode is supported where data is loaded at one byte per rising edge of
16 the clock, with the MSB of each byte presented to the D0 pin.
22 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
27 - xlnx,fpga-xc7s-selectmap
28 - xlnx,fpga-xc7a-selectmap
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