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/Documentation/admin-guide/cgroup-v1/
Dhugetlb.rst34 For a system supporting three hugepage sizes (64k, 32M and 1G), the control
46 hugetlb.64KB.limit_in_bytes
47 hugetlb.64KB.max_usage_in_bytes
48 hugetlb.64KB.numa_stat
49 hugetlb.64KB.usage_in_bytes
50 hugetlb.64KB.failcnt
51 hugetlb.64KB.rsvd.limit_in_bytes
52 hugetlb.64KB.rsvd.max_usage_in_bytes
53 hugetlb.64KB.rsvd.usage_in_bytes
54 hugetlb.64KB.rsvd.failcnt
/Documentation/translations/zh_TW/arch/arm64/
Dmemory.txt37 頁大小爲 4KB 的 4 級轉換表和頁大小爲 64KB 的 3 級轉換表。
39 AArch64 Linux 使用 3 級或 4 級轉換表，其頁大小配置爲 4KB，對於用戶和內核
41 對於頁大小爲 64KB的配置，僅使用 2 級轉換表，有 42-bit (4TB) 的虛擬地址空間，但內存佈局相同。
49 AArch64 Linux 在頁大小爲 4KB，並使用 3 級轉換表時的內存佈局：
57 AArch64 Linux 在頁大小爲 4KB，並使用 4 級轉換表時的內存佈局：
65 AArch64 Linux 在頁大小爲 64KB，並使用 2 級轉換表時的內存佈局：
73 AArch64 Linux 在頁大小爲 64KB，並使用 3 級轉換表時的內存佈局：
84 4KB 頁大小的轉換表查找：
99 64KB 頁大小的轉換表查找：
/Documentation/translations/zh_CN/arch/arm64/
Dmemory.txt33 页大小为 4KB 的 4 级转换表和页大小为 64KB 的 3 级转换表。
35 AArch64 Linux 使用 3 级或 4 级转换表，其页大小配置为 4KB，对于用户和内核
37 对于页大小为 64KB的配置，仅使用 2 级转换表，有 42-bit (4TB) 的虚拟地址空间，但内存布局相同。
45 AArch64 Linux 在页大小为 4KB，并使用 3 级转换表时的内存布局：
53 AArch64 Linux 在页大小为 4KB，并使用 4 级转换表时的内存布局：
61 AArch64 Linux 在页大小为 64KB，并使用 2 级转换表时的内存布局：
69 AArch64 Linux 在页大小为 64KB，并使用 3 级转换表时的内存布局：
80 4KB 页大小的转换表查找：
95 64KB 页大小的转换表查找：
/Documentation/arch/arm64/
Dmemory.rst9 tables with a 4KB page size and up to 3 levels with a 64KB page size.
12 with the 4KB page configuration, allowing 39-bit (512GB) or 48-bit
14 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
18 only available when running with a 64KB page size and expands the
27 AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit)::
44 AArch64 Linux memory layout with 64KB pages + 3 levels (52-bit with HW support)::
61 Translation table lookup with 4KB pages::
76 Translation table lookup with 64KB pages::
104 with a 64KB page size; then it is possible to use 52-bits of address
/Documentation/filesystems/ext4/
Dblockgroup.rst85 128MiB(2^27 bytes) block group size and 64-byte group descriptors, ext4
86 can have at most 2^27/64 = 2^21 block groups. This limits the entire
94 filesystems with 4 KB block size, a single metablock group partition
95 includes 64 block groups, or 8 GiB of disk space. The metablock group
108 block. Since the size of the block group descriptor structure is 64
110 a 1KB block size, and 64 block groups for filesystems with a 4KB
/Documentation/filesystems/
Dproc.rst183 VmPeak: 5004 kB
184 VmSize: 5004 kB
185 VmLck: 0 kB
186 VmHWM: 476 kB
187 VmRSS: 476 kB
188 RssAnon: 352 kB
189 RssFile: 120 kB
190 RssShmem: 4 kB
191 VmData: 156 kB
192 VmStk: 88 kB
[all …]
/Documentation/arch/x86/x86_64/
Dmm.rst13 from the top of the 64-bit address space. It's easier to understand the layout
17 64-bit address space (ffffffffffffffff).
20 from TB to GB and then MB/KB.
24 It also shows it nicely how incredibly large 64-bit address space is.
35 …0000800000000000 | +128 TB | ffff7fffffffffff | ~16M TB | ... huge, almost 64 bits wide hole of…
45 …ffff888000000000 | -119.5 TB | ffffc87fffffffff | 64 TB | direct mapping of all physical memory…
63 ffffffef00000000 | -68 GB | fffffffeffffffff | 64 GB | EFI region mapping space
70 ffffffffff600000 | -10 MB | ffffffffff600fff | 4 kB | legacy vsyscall ABI
81 from 0.125 PB to 64 PB. All kernel mappings shift down to the -64 PB starting
91 …0000000000000000 | 0 | 00ffffffffffffff | 64 PB | user-space virtual memory, different …
[all …]
/Documentation/mm/
Dvmemmap_dedup.rst19 details. On the x86-64 architecture, HugeTLB pages of size 2MB and 1GB are
20 currently supported. Since the base page size on x86 is 4KB, a 2MB HugeTLB page
34 architectures. Because arm64 supports 4k, 16k, and 64k base pages and
41 | x86-64 | 4KB | 2MB | 1GB | | |
43 | | 4KB | 64KB | 2MB | 32MB | 1GB |
45 | arm64 | 16KB | 2MB | 32MB | 1GB | |
47 | | 64KB | 2MB | 512MB | 16GB | |
73 = 64 / 8
79 This optimization only supports 64-bit system, so the value of sizeof(pte_t)
81 is a power of two. In most cases, the size of ``struct page`` is 64 bytes (e.g.
[all …]
Dpage_tables.rst29 With a page granularity of 4KB and a address range of 32 bits, pfn 0 is at
31 and so on until we reach pfn 0xfffff at 0xfffff000. With 16KB pages pfs are
34 As you can see, with 4KB pages the page base address uses bits 12-31 of the
39 sizes. When Linux was created, 4KB pages and a single page table called
92 A typical example is that the `pteval_t` is a 32- or 64-bit value with the
254 Linux supports larger page sizes than the usual 4KB (i.e., the so called
/Documentation/admin-guide/device-mapper/
Dthin-provisioning.rst110 $data_block_size must be between 128 (64KB) and 2097152 (1GB) and a
111 multiple of 128 (64KB). $data_block_size cannot be changed after the
113 may want to use a value such as 1024 (512KB). People doing lots of
114 snapshotting may want a smaller value such as 128 (64KB). If you are
294 Data block size must be between 64KB (128 sectors) and 1GB
308 A 64-bit number used by userspace to help synchronise with metadata
378 arbitrary 64-bit transaction id and return it on the target's
Dcache.rst68 using block sizes of 256KB - 1024KB. The block size must be between 64
69 sectors (32KB) and 2097152 sectors (1GB) and a multiple of 64 sectors (32KB).
/Documentation/devicetree/bindings/reserved-memory/
Dramoops.yaml138 reg = <0xbfdf0000 0x10000>; /* 64kB */
139 console-size = <0x8000>; /* 32kB */
140 record-size = <0x400>; /* 1kB */
/Documentation/devicetree/bindings/pci/
Dintel,ixp4xx-pci.yaml38 description: Typically one memory range of 64MB and one IO
39 space range of 64KB.
44 the RAM is at. It can map only 64MB so if the RAM is bigger
45 than 64MB the DMA access has to be restricted to these
Dv3-v360epc-pci.txt10 first the base address of the V3 host bridge controller, 64KB
23 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked
/Documentation/staging/
Dlzo.rst134 2-byte block from the dictionary within a 1kB distance. It is worth
139 0 0 0 0 D D S S (0..15) : copy 2 bytes from <= 1kB distance
147 dictionary from a 2..3kB distance, and must be interpreted like this :
149 0 0 0 0 D D S S (0..15) : copy 3 bytes from 2..3 kB distance
156 Copy of a block within 16..48kB distance (preferably less than 10B)
173 Copy of small block within 16kB distance (preferably less than 34B)
179 0 1 L D D D S S (64..127)
180 Copy 3-4 bytes from block within 2kB distance
187 Copy 5-8 bytes from block within 2kB distance
/Documentation/translations/zh_TW/arch/arm/
DBooting125 bootloader 必須以 64bit 地址對齊的形式加載一個設備樹映像(dtb)到系統
147 基地址的前 16KB RAM 空間來保存頁表。建議將映像置於 RAM 的 32KB 處。
/Documentation/translations/zh_CN/arch/arm/
DBooting125 bootloader 必须以 64bit 地址对齐的形式加载一个设备树映像(dtb)到系统
147 基地址的前 16KB RAM 空间来保存页表。建议将映像置于 RAM 的 32KB 处。
/Documentation/admin-guide/mm/
Dtranshuge.rst52 memory (for example 16K, 32K, 64K, etc). These THPs continue to be
115 echo always >/sys/kernel/mm/transparent_hugepage/hugepages-<size>kB/enabled
116 echo madvise >/sys/kernel/mm/transparent_hugepage/hugepages-<size>kB/enabled
117 echo never >/sys/kernel/mm/transparent_hugepage/hugepages-<size>kB/enabled
124 echo always >/sys/kernel/mm/transparent_hugepage/hugepages-2048kB/enabled
129 echo inherit >/sys/kernel/mm/transparent_hugepage/hugepages-<size>kB/enabled
133 echo inherit >/sys/kernel/mm/transparent_hugepage/hugepages-2048kB/enabled
311 For example, the following will set 16K, 32K, 64K THP to ``always``,
315 thp_anon=16K-64K:always;128K,512K:inherit;256K:madvise;1M-2M:never
370 '/sys/kernel/mm/transparent_hugepage/hugepages-<size>kB/shmem_enabled',
[all …]
/Documentation/devicetree/bindings/powerpc/fsl/
Dmsi-pic.txt33 - msi-address-64: 64-bit PCI address of the MSIIR register. The MSIIR register
81 The Freescale hypervisor and msi-address-64
103 restrictions, it is usually impossible to create a 4KB subwindow that
109 this. The address specified in the msi-address-64 property is the PCI
/Documentation/virt/kvm/x86/
Dhypercalls.rst153 128 destinations per hypercall in 64-bit mode and 64 vCPUs per
180 a1: the number of (4kb) pages (must be contiguous in GPA space)
184 * bits 3:0 - preferred page size encoding 0 = 4kb, 1 = 2mb, 2 = 1gb, etc...
/Documentation/arch/xtensa/
Dmmu.rst83 | VMALLOC area | VMALLOC_START 0xc0000000 128MB - 64KB
126 | VMALLOC area | VMALLOC_START 0xa0000000 128MB - 64KB
170 | VMALLOC area | VMALLOC_START 0x90000000 128MB - 64KB
/Documentation/scsi/
DChangeLog.sym53c8xx_278 - Forces the max number of tasks per LUN to at least 64.
105 - Add infrastructure for the forthcoming 64 bit DMA addressing support.
106 (Based on PCI 64 bit patch from David S. Miller)
111 - Add support for 64 bit DMA addressing using segment registers.
112 16 registers for up to 4 GB x 16 -> 64 GB.
137 even on PPC64 / 4KB PAGE surprising setup.
/Documentation/devicetree/bindings/remoteproc/
Dxlnx,zynqmp-r5fss.yaml72 Each RPU contains one 64KB memory and two 32KB memories that
73 are accessed via the TCM A and B port interfaces, for a total of 128KB
74 per processor. In lock-step mode, the processor has access to 256KB of
/Documentation/admin-guide/
Dpstore-blk.rst38 pstore_blk.blkdev=/dev/mmcblk0p7 pstore_blk.kmsg_size=64 best_effort=y
78 The chunk size in KB for oops/panic front-end. It **MUST** be a multiple of 4.
90 The chunk size in KB for pmsg front-end. It **MUST** be a multiple of 4.
102 The chunk size in KB for console front-end. It **MUST** be a multiple of 4.
113 The chunk size in KB for ftrace front-end. It **MUST** be a multiple of 4.
/Documentation/usb/
Dehci.rst116 is 6, indicating 2^6 = 64 microframes. This controls how often
206 In typical situations, a usb_bulk_msg() loop writing out 4 KB chunks is
209 than the I/O. If that same loop used 16 KB chunks, it'd be better; a
210 sequence of 128 KB chunks would waste a lot less.

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