Searched full:7 (Results 1 – 25 of 1385) sorted by relevance
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| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-srggb10-ipu3.rst | 40 - G\ :sub:`0001low`\ (bits 7--2) 43 - B\ :sub:`0002low`\ (bits 7--4) 46 - G\ :sub:`0003low`\ (bits 7--6) 52 - G\ :sub:`0005low`\ (bits 7--2) 55 - B\ :sub:`0006low`\ (bits 7--4) 59 - G\ :sub:`0007low`\ (bits 7--6) 64 - G\ :sub:`0009low`\ (bits 7--2) 68 - B\ :sub:`0010low`\ (bits 7--4) 71 - G\ :sub:`0011low`\ (bits 7--6) 77 - G\ :sub:`0013low`\ (bits 7--2) [all …]
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| D | pixfmt-packed-yuv.rst | 15 - In all the tables that follow, bit 7 is the most significant bit in a byte. 51 - :cspan:`7` Byte 0 in memory 53 - :cspan:`7` Byte 1 57 - 7 66 - 7 159 format stores a pixel with Cr\ :sub:`7-0` in the first byte, Cb\ :sub:`7-0` in 160 the second byte and Y'\ :sub:`7-0` in the third byte. 178 - A\ :sub:`7-0` 179 - Y'\ :sub:`7-0` 180 - Cb\ :sub:`7-0` [all …]
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| D | pixfmt-rgb.rst | 44 - In all the tables that follow, bit 7 is the most significant bit in a byte. 81 - :cspan:`7` Byte 0 in memory 82 - :cspan:`7` Byte 1 83 - :cspan:`7` Byte 2 84 - :cspan:`7` Byte 3 87 - 7 96 - 7 105 - 7 114 - 7 647 of bits per pixel. For instance, RGB24 format stores a pixel with [R\ :sub:`7` [all …]
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| D | pixfmt-packed-hsv.rst | 38 - :cspan:`7` Byte 0 in memory 39 - :cspan:`7` Byte 1 40 - :cspan:`7` Byte 2 41 - :cspan:`7` Byte 3 45 - 7 54 - 7 63 - 7 72 - 7 94 - h\ :sub:`7` 103 - s\ :sub:`7` [all …]
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| D | metafmt-vsp1-hgo.rst | 54 - [7:0] 57 - R/Cr/H max [7:0] 59 - R/Cr/H min [7:0] 62 - G/Y/S max [7:0] 64 - G/Y/S min [7:0] 67 - B/Cb/V max [7:0] 69 - B/Cb/V min [7:0] 105 - [7:0] 108 - max(R,G,B) max [7:0] 110 - max(R,G,B) min [7:0] [all …]
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| D | subdev-formats.rst | 225 :widths: 36 7 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 258 - 7 1075 - r\ :sub:`7` 1083 - b\ :sub:`7` 1091 - g\ :sub:`7` 1223 - b\ :sub:`7` 1231 - g\ :sub:`7` 1239 - r\ :sub:`7` 1276 - b\ :sub:`7` 1311 - g\ :sub:`7` [all …]
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| D | pixfmt-srggb14p.rst | 63 - G\ :sub:`01low bits 1--0`\ (bits 7--6) 67 - B\ :sub:`02low bits 3--0`\ (bits 7--4) 71 - G\ :sub:`03low bits 5--0`\ (bits 7--2) 77 - start + 7 87 - R\ :sub:`11low bits 1--0`\ (bits 7--6) 91 - G\ :sub:`12low bits 3--0`\ (bits 7--4) 95 - R\ :sub:`13low bits 5--0`\ (bits 7--2) 111 - G\ :sub:`21low bits 1--0`\ (bits 7--6) 115 - B\ :sub:`22low bits 3--0`\ (bits 7--4) 119 - G\ :sub:`23low bits 5--0`\ (bits 7--2) [all …]
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| /Documentation/input/ |
| D | shape.svg | 3 …points="4200 3675 4200 5400" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 4 …points="8250 3675 8250 5400" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 5 …translate(-121.88 -68.4)" points="3675 3600 8700 3600" fill="none" stroke="#000" stroke-width="7"/> 6 …oints="8775 3600 10200 3600" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 7 …points="8325 3150 9075 3150" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 8 …oints="7500 2325 10200 2325" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 9 … points="3600 3600 3e3 3600" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 10 … points="4125 3075 3e3 3075" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 11 …translate(-121.88 -68.4)" points="4217 5400 8158 5400" fill="none" stroke="#000" stroke-width="7"/> 12 …="8053 5430 8173 5400 8053 5370" fill="none" stroke="#000" stroke-miterlimit="8" stroke-width="7"/> [all …]
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| D | interactive.svg | 3 …="1181.5" y="3133.7" width="3600" height="3150" rx="0" fill="none" stroke="#000" stroke-width="7"/> 4 …translate(-18.5,-16.294)" points="1200 4800 4800 4800" fill="none" stroke="#000" stroke-width="7"/> 5 …00 6525 1950 7125 1950 7800" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 6 …e3 6525 3600 7125 3600 7800" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 7 …-18.5,-16.294)" points="3837 5389 4125 5100 5400 5100" fill="none" stroke="#000" stroke-width="7"/> 8 …="3889 5292 3826 5398 3932 5334" fill="none" stroke="#000" stroke-miterlimit="8" stroke-width="7"/> 9 …-18.5,-16.294)" points="2112 4189 2400 3900 5400 3900" fill="none" stroke="#000" stroke-width="7"/> 10 …="2164 4092 2101 4198 2207 4134" fill="none" stroke="#000" stroke-miterlimit="8" stroke-width="7"/> 11 …points="4800 5700 5400 5700" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> 12 …points="1800 3600 5400 3600" fill="none" stroke="#000" stroke-dasharray="40, 40" stroke-width="7"/> [all …]
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| /Documentation/translations/zh_CN/core-api/ |
| D | packing.rst | 54 以下示例介绍了打包u64字段的内存布局。打包缓冲区中的字节偏移量始终默认为0,1...7。 62 7 6 5 4 63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 66 也就是说,CPU可使用的u64的MSByte(7)位于内存偏移量0处,而u64的LSByte(0)位于内存偏移量7处。 76 7 6 5 4 77 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 88 4 5 6 7 89 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 101 4 5 6 7 102 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 [all …]
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| /Documentation/hwmon/ |
| D | nct6775.rst | 143 pwm[1-7] 148 pwm[1-7]_enable 158 pwm[1-7]_mode 167 pwm[1-7]_temp_sel 171 pwm[1-7]_weight_temp_sel 179 pwm[1-7]_weight_duty_step 182 pwm[1-7]_weight_temp_step 187 pwm[1-7]_weight_temp_step_base 191 pwm[1-7]_weight_temp_step_tol 199 pwm[1-7]_target_temp [all …]
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| D | lt7182s.rst | 72 in[3-4|6-7]_label "vout[1-2]" 73 in[3-4|6-7]_input Measured output voltage 74 in[3-4|6-7]_highest Highest measured output voltage 75 in[3-4|6-7]_lcrit Critical minimum output voltage 76 in[3-4|6-7]_lcrit_alarm Output voltage critical low alarm 77 in[3-4|6-7]_min Minimum output voltage 78 in[3-4|6-7]_max_alarm Output voltage low alarm 79 in[3-4|6-7]_max Maximum output voltage 80 in[3-4|6-7]_max_alarm Output voltage high alarm 81 in[3-4|6-7]_crit Critical maximum output voltage [all …]
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| D | gxp-fan-ctrl.rst | 25 pwm[0-7] Fan 0 to 7 respective PWM value (0-255) 26 fan[0-7]_fault Fan 0 to 7 respective fault status: 1 fail, 0 ok 27 fan[0-7]_enable Fan 0 to 7 respective enabled status: 1 enabled, 0 disabled
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| /Documentation/core-api/ |
| D | packing.rst | 44 perspective, bit 63 always means bit offset 7 of byte 7, albeit only 48 The byte offsets in the packed buffer are always implicitly 0, 1, ... 7. 56 7 6 5 4 57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 60 That is, the MSByte (7) of the CPU-usable u64 sits at memory offset 0, and the 61 LSByte (0) of the u64 sits at memory offset 7. 72 7 6 5 4 73 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 85 4 5 6 7 86 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 [all …]
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| /Documentation/devicetree/bindings/mailbox/ |
| D | nvidia,tegra186-hsp.yaml | 34 - bits 7..0: 89 - pattern: "^shared[0-7]$" 90 - pattern: "^shared[0-7]$" 91 - pattern: "^shared[0-7]$" 92 - pattern: "^shared[0-7]$" 93 - pattern: "^shared[0-7]$" 94 - pattern: "^shared[0-7]$" 95 - pattern: "^shared[0-7]$" 96 - pattern: "^shared[0-7]$" 99 - pattern: "^shared[0-7]$" [all …]
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| /Documentation/input/devices/ |
| D | elantech.rst | 33 7. Hardware version 4 183 bit 7 6 5 4 3 2 1 0 197 bit 7 6 5 4 3 2 1 0 240 bit 7 6 5 4 3 2 1 0 251 bit 7 6 5 4 3 2 1 0 259 bit 7 6 5 4 3 2 1 0 268 bit 7 6 5 4 3 2 1 0 289 bit 7 6 5 4 3 2 1 0 308 bit 7 6 5 4 3 2 1 0 317 bit 7 6 5 4 3 2 1 0 [all …]
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-netxbig.txt | 41 NETXBIG_LED_TIMER2 7>; 43 max-brightness = <7>; 52 max-brightness = <7>; 58 NETXBIG_LED_ON 7 62 max-brightness = <7>; 71 max-brightness = <7>; 77 NETXBIG_LED_ON 7 81 max-brightness = <7>; 90 max-brightness = <7>;
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| /Documentation/gpu/amdgpu/ |
| D | apu-asic-info-table.csv | 7 Ryzen 5000 series / Ryzen 7x30 series, GREEN SARDINE / Cezanne / Barcelo / Barcelo-R, DCN 2.1, 9.3,… 8 Ryzen 6000 series / Ryzen 7x35 series / Ryzen 7x36 series, YELLOW CARP / Rembrandt / Rembrandt-R, 3… 11 Ryzen 7x45 series (FL1), Dragon Range, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5 12 Ryzen 7x20 series, Mendocino, 3.1.6, 10.3.7, 3.1.1, 5.2.7, 13.0.8 13 Ryzen 7x40 series, Phoenix, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11
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| /Documentation/devicetree/bindings/perf/ |
| D | apm-xgene-pmu.txt | 41 csw: csw@7e200000 { 46 mcba: mcba@7e700000 { 51 mcbb: mcbb@7e720000 { 67 pmul3c@7e610000 { 72 pmuiob@7e940000 { 77 pmucmcb@7e710000 { 83 pmucmcb@7e730000 { 89 pmucmc@7e810000 { 95 pmucmc@7e850000 { 101 pmucmc@7e890000 { [all …]
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| /Documentation/i2c/ |
| D | i2c-sysfs.rst | 122 i2c-7 (physical I2C bus controller 7) 123 `-- 7-0071 (4-channel I2C MUX at 0x71) 131 | `-- i2c-85 (channel-7) 151 $ readlink /sys/bus/i2c/devices/i2c-7/device 153 $ ls /sys/bus/i2c/devices/i2c-7/mux_device 154 ls: /sys/bus/i2c/devices/i2c-7/mux_device: No such file or directory 156 In this case, ``i2c-7`` is a physical I2C bus, so it does not have the symbolic 159 mean the physical I2C bus controller 7 of the system. 170 ../../i2c-7 172 ../7-0071 [all …]
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-simple.yaml | 64 # Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel 78 # CDTech(H.K.) Electronics Limited 7" WSVGA (1024x600) TFT LCD Panel 80 # CDTech(H.K.) Electronics Limited 7" WVGA (800x480) TFT LCD Panel 82 # CDTech(H.K.) Electronics Limited 7" 800x480 color TFT-LCD panel 96 # DataImage, Inc. 7" WVGA (800x480) TFT LCD panel with 24-bit parallel interface. 159 # Innolux G070ACE-L01 7" WVGA (800x480) TFT LCD panel 161 # Innolux G070ACE-LH3 7" WVGA (800x480) TFT LCD panel with WLED backlight 163 # Innolux G070Y2-L01 7" WVGA (800x480) TFT LCD panel 165 # Innolux G070Y2-T02 7" WVGA (800x480) TFT LCD TTL panel 185 # Kyocera Corporation 7" WVGA (800x480) transmissive color TFT [all …]
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| /Documentation/devicetree/bindings/display/msm/ |
| D | dsi-phy-7nm.yaml | 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml# 7 title: Qualcomm Display DSI 7nm PHY 18 - qcom,dsi-phy-7nm 19 - qcom,dsi-phy-7nm-8150 20 - qcom,sc7280-dsi-phy-7nm 21 - qcom,sm6375-dsi-phy-7nm 61 compatible = "qcom,dsi-phy-7nm";
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| /Documentation/ABI/testing/ |
| D | sysfs-class-pktcdvd | 23 pktcdvd[0-7] <pktdevid> <blkdevid> 27 What: /sys/class/pktcdvd/pktcdvd[0-7]/dev 28 What: /sys/class/pktcdvd/pktcdvd[0-7]/uevent 38 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/packets_started 39 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/packets_finished 40 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/kb_written 41 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/kb_read 42 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/kb_read_gather 43 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/reset 63 What: /sys/class/pktcdvd/pktcdvd[0-7]/write_queue/size [all …]
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| /Documentation/devicetree/bindings/regulator/ |
| D | raspberrypi,7inch-touchscreen-panel-regulator.yaml | 4 $id: http://devicetree.org/schemas/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml# 7 title: RaspberryPi 7" display ATTINY88-based regulator/backlight controller 13 The RaspberryPi 7" display has an ATTINY88-based regulator/backlight 22 const: raspberrypi,7inch-touchscreen-panel-regulator 39 compatible = "raspberrypi,7inch-touchscreen-panel-regulator";
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| /Documentation/devicetree/bindings/sound/ |
| D | nuvoton,nau8821.yaml | 62 - 7 # VDDA * 1.53 76 description: number from 0 to 7 that sets debounce time to 2^(n+2)ms. 78 maximum: 7 79 default: 7 82 description: number from 0 to 7 that sets debounce time to 2^(n+2)ms. 84 maximum: 7 93 description: The range 0 to 7 represents the speed of DMIC slew rate. 95 7 means the fastest rate. 97 maximum: 7 141 nuvoton,jack-insert-debounce = <7>;
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