| /Documentation/admin-guide/media/ |
| D | dvb_intro.rst | 133 T 177500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE
134 T 184500000 7MHz AUTO AUTO QAM64 8k 1/8 NONE
135 T 191625000 7MHz AUTO AUTO QAM64 8k 1/16 NONE
136 T 219500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE
137 T 226500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE
138 T 557625000 7MHz AUTO AUTO QPSK 8k 1/16 NONE
151 TRANSMISSION_MODE = 8K
179 TRANSMISSION_MODE = 8K
194 TRANSMISSION_MODE = 8K
209 TRANSMISSION_MODE = 8K
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | marvell,armada-8k-pic.txt | 1 Marvell Armada 7K/8K PIC Interrupt controller
5 controller available on the Marvell Armada 7K/8K ARM64 SoCs, and
9 - compatible: should be "marvell,armada-8k-pic"
20 compatible = "marvell,armada-8k-pic";
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-mvebu-comphy.txt | 5 * Armada 7k/8k (on the CP110)
13 * "marvell,comphy-cp110" for Armada 7k/8k
16 * 1 entry for Armada 7k/8k
24 controller node (only for Armada 7k/8k)
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| /Documentation/devicetree/bindings/net/ |
| D | marvell,orion-mdio.yaml | 14 Armada 370, Armada XP, Armada 7k and Armada 8k have an identical unit that
15 provides an interface with the MDIO bus. Additionally, Armada 7k and Armada
16 8k has a second unit which provides an interface with the xMDIO bus. This
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| D | marvell,pp2.yaml | 7 title: Marvell CN913X / Marvell Armada 375, 7K, 8K Ethernet Controller
15 Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
22 - marvell,armada-7k-pp22
129 only for marvell,armada-7k-pp22, ID of the port from the
149 const: marvell,armada-7k-pp22
231 // For Armada 7k/8k and Cn913x variants
238 compatible = "marvell,armada-7k-pp22";
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| /Documentation/devicetree/bindings/ |
| D | trivial-devices.yaml | 238 # Microchip 7-bit Single I2C Digital POT (10k)
240 # Microchip 7-bit Single I2C Digital POT (100k)
242 # Microchip 7-bit Single I2C Digital POT (5k)
244 # Microchip 7-bit Single I2C Digital POT (50k)
246 # Microchip 7-bit Single I2C Digital POT (10k)
248 # Microchip 7-bit Single I2C Digital POT (100k)
250 # Microchip 7-bit Single I2C Digital POT (5k)
252 # Microchip 7-bit Single I2C Digital POT (50k)
254 # Microchip 7-bit Single I2C Digital POT (10k)
256 # Microchip 7-bit Single I2C Digital POT (100k)
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | armada-7k-8k.yaml | 4 $id: http://devicetree.org/schemas/arm/marvell/armada-7k-8k.yaml#
7 title: Marvell Armada 7K/8K Platforms
96 SolidRun CN9132 COM-Express Type 7 based single-board computers
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| D | ap80x-system-controller.txt | 5 7K/8K/931x SoCs. It contains system controllers, which provide several
58 mpp7 7 gpio, sdio(d4), uart1(rxd)
79 - compatible: "marvell,armada-8k-gpio"
103 compatible = "marvell,armada-8k-gpio";
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| /Documentation/devicetree/bindings/dma/ |
| D | marvell,xor-v2.yaml | 18 - marvell,armada-7k-xor
55 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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| /Documentation/devicetree/bindings/rtc/ |
| D | marvell,armada-380-rtc.yaml | 7 title: RTC controller for the Armada 38x, 7K and 8K SoCs
19 - marvell,armada-8k-rtc
|
| /Documentation/devicetree/bindings/i2c/ |
| D | marvell,mv64xxx-i2c.yaml | 57 - description: Bus clock (Only for Armada 7K/8K)
65 Mandatory if two clocks are used (only for Armada 7k and 8k).
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| /Documentation/ABI/testing/ |
| D | dell-smbios-wmi | 17 Commonly this size is either 4k or 32k.
39 7) The output will be returned in the buffer object.
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-simple.yaml | 64 # Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel
76 # CDTech(H.K.) Electronics Limited 4.3" 480x272 color TFT-LCD panel
78 # CDTech(H.K.) Electronics Limited 7" WSVGA (1024x600) TFT LCD Panel
80 # CDTech(H.K.) Electronics Limited 7" WVGA (800x480) TFT LCD Panel
82 # CDTech(H.K.) Electronics Limited 7" 800x480 color TFT-LCD panel
96 # DataImage, Inc. 7" WVGA (800x480) TFT LCD panel with 24-bit parallel interface.
159 # Innolux G070ACE-L01 7" WVGA (800x480) TFT LCD panel
161 # Innolux G070ACE-LH3 7" WVGA (800x480) TFT LCD panel with WLED backlight
163 # Innolux G070Y2-L01 7" WVGA (800x480) TFT LCD panel
165 # Innolux G070Y2-T02 7" WVGA (800x480) TFT LCD TTL panel
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| /Documentation/devicetree/bindings/pci/ |
| D | nvidia,tegra194-pcie-ep.yaml | 93 - const: p2u-7
140 7 : C7
221 reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K) */
222 <0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
223 <0x00 0x3a080000 0x0 0x00040000>, /* DBI reg space (256K) */
260 "p2u-5", "p2u-6", "p2u-7";
279 reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K) */
280 <0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
281 <0x00 0x3a080000 0x0 0x00040000>, /* DBI reg space (256K) */
317 "p2u-5", "p2u-6", "p2u-7";
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| D | pci-armada8k.txt | 1 * Marvell Armada 7K/8K PCIe interface
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| /Documentation/devicetree/bindings/media/ |
| D | qcom,venus-common.yaml | 10 - Stanimir Varbanov <stanimir.k.varbanov@gmail.com>
23 maxItems: 7
27 maxItems: 7
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| /Documentation/devicetree/bindings/clock/ |
| D | imx8m-clock.yaml | 33 maxItems: 7
37 maxItems: 7
63 - description: 32k osc
83 - description: 32k osc
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| /Documentation/userspace-api/media/dvb/ |
| D | fe_property_parameters.rst | 58 the main carrier has a 1/7 offset from the center.
129 DVB-T 6MHz, 7MHz and 8MHz.
130 DVB-T2 1.172 MHz, 5MHz, 6MHz, 7MHz, 8MHz and 10MHz
131 ISDB-T 5MHz, 6MHz, 7MHz and 8MHz, although most places
474 Possible values: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, -1 (AUTO)
585 - Mode 1 (2K FFT)
587 - Mode 2 (4K FFT)
589 - Mode 3 (8K FFT)
672 Possible values: 1, 2, 3, 4, 5, 6, 7, 8
709 Possible values: 1, 2, 3, 4, 5, 6, 7, 8
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| /Documentation/devicetree/bindings/mtd/ |
| D | marvell,nand-controller.yaml | 16 - const: marvell,armada-8k-nand-controller
25 - marvell,armada-8k-nand
38 is only needed for the Armada 7K/8K SoCs
128 const: marvell,armada-8k-nand-controller
187 compatible = "marvell,armada-8k-nand-controller",
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| /Documentation/networking/ |
| D | arcnet-hardware.rst | 72 splitting," that allows "virtual packets" to grow as large as 64K each,
279 - the IRQ: on 8-bit cards, it might be 2 (9), 3, 4, 5, or 7.
280 on 16-bit cards, it might be 2 (9), 3, 4, 5, 7, or 10-15.
299 IRQ 7 FREE (LPT1 if you don't use the polling driver; PLIP)
341 640k.
492 1 2 3 4 5 6 7 8 9 10
545 1 2 3 4 5 6 7 8
592 8 7 6 5 4 3 2 1
602 | | SOCKET | o | | 7
623 7-8: RAM Offset Select
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| D | filter.rst | 80 __u32 k; /* Generic multiuse field */
84 a code, jt, jf and k value. jt and jf are jump offsets and k a generic
207 op:16, jt:8, jf:8, k:32
211 "jump if true", the other one "jump if false". Eventually, element k
236 jeq 7, 8, 9, 10 Jump on A == <x>
241 jgt 7, 8, 9, 10 Jump on A > <x>
242 jge 7, 8, 9, 10 Jump on A >= <x>
243 jset 7, 8, 9, 10 Jump on A & <x>
269 1 [k] BHW at byte offset k in the packet
270 2 [x + k] BHW at the offset X + k in the packet
[all …]
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| /Documentation/arch/powerpc/ |
| D | vmemmap_dedup.rst | 11 with a 64K page size, only the devdax namespace with 1G alignment uses vmemmap
14 With 2M PMD level mapping, we require 32 struct pages and a single 64K vmemmap
15 page can contain 1024 struct pages (64K/sizeof(struct page)). Hence there is no
18 With 1G PUD level mapping, we require 16384 struct pages and a single 64K
19 vmemmap page can contain 1024 struct pages (64K/sizeof(struct page)). Hence we
20 require 16 64K pages in vmemmap to map the struct page for 1G PUD level mapping.
46 With 4K page size, 2M PMD level mapping requires 512 struct pages and a single
47 4K vmemmap page contains 64 struct pages(4K/sizeof(struct page)). Hence we
48 require 8 4K pages in vmemmap to map the struct page for 2M pmd level mapping.
67 | | | 7 | --------------------------+
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-orion.txt | 19 chip-select lines 0 through 7 respectively.
30 is only for Armada 7K/8K).
|
| /Documentation/crypto/ |
| D | descore-readme.rst | 62 - 30us per encryption (options: 64k tables, no IP/FP)
63 - 33us per encryption (options: 64k tables, FIPS standard bit ordering)
64 - 45us per encryption (options: 2k tables, no IP/FP)
65 - 48us per encryption (options: 2k tables, FIPS standard bit ordering)
66 - 275us to set a new key (uses 1k of key tables)
80 - 53us per encryption (uses 2k of tables)
81 - 96us to set a new key (uses 2.25k of key tables)
106 - 68us per encryption (uses 2k of tables)
107 - 96us to set a new key (uses 2.25k of key tables)
125 des iteration; above, Quick (64k) takes 21 and Small (2k) takes 37.
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| /Documentation/translations/zh_CN/maintainer/ |
| D | modifying-patches.rst | 26 Signed-off-by: Lucky K Maintainer <lucky@maintainer.example.org>
36 Date: Tue Oct 7 07:26:38 2014 -0400
|