Searched +full:8 +full:- +full:channel (Results 1 – 25 of 366) sorted by relevance
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| /Documentation/ABI/testing/ |
| D | configfs-most | 2 Date: March 8, 2019 9 # mount -t configfs none /sys/kernel/config/ 13 Date: March 8, 2019 19 configure the buffer size for this channel 22 configure the sub-buffer size for this channel 28 channel 32 this channel 51 channel 52 name of the channel the link is to be attached to 60 configuration, the creation is post-poned until [all …]
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| D | sysfs-class-net-peak_usb | 5 Contact: Stephane Grosjean <s.grosjean@peak-system.com> 7 PEAK PCAN-USB devices support user-configurable CAN channel 11 can be assigned a unique channel ID. 12 This attribute provides read-only access to the currently 13 configured value of the channel identifier. Depending on the 14 device type, the identifier has a length of 8 or 32 bit. The 15 value read from this attribute is always an 8 digit 32 bit 17 supports an 8 bit identifier, the upper 24 bit of the value are
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7173.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ceclan Dumitru <dumitru.ceclan@analog.com> 15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which 16 can be used in high precision, low noise single channel applications 18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended 23 The AD411X family encompasses a series of low power, low noise, 24-bit, 24 sigma-delta analog-to-digital converters that offer a versatile range of 26 fully differential/single-ended and bipolar voltage inputs. [all …]
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| D | qcom,spmi-vadc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 15 voltage. The VADC is a 15-bit sigma-delta ADC. 17 voltage. The VADC is a 16-bit sigma-delta ADC. 22 - items: 23 - const: qcom,pms405-adc [all …]
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| D | ti,am3359-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/ti,am3359-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <miquel.raynal@bootlin.com> 15 - enum: 16 - ti,am3359-adc 17 - ti,am4372-adc 18 - items: 19 - enum: [all …]
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| D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 11 - Olivier Moysan <olivier.moysan@foss.st.com> 14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to 17 - Sigma delta modulators (motor control, metering...) 18 - PDM microphones (audio digital microphone) 20 It features up to 8 serial digital interfaces (SPI or Manchester) and [all …]
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| D | renesas,rcar-gyroadc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car GyroADC 10 - Marek Vasut <marek.vasut+renesas@gmail.com> 13 The GyroADC block is a reduced SPI block with up to 8 chipselect lines, 15 are sampled by the GyroADC block in a round-robin fashion and the result 23 - enum: 24 - renesas,r8a7791-gyroadc [all …]
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| D | xilinx-xadc.txt | 22 - compatible: Should be one of 23 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device 25 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to 27 * "xlnx,system-management-wiz-1.3": When using the 30 - reg: Address and length of the register set for the device 31 - interrupts: Interrupt for the XADC control interface. 32 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock, 33 when using the axi-xadc or the axi-system-management-wizard this must be 37 - xlnx,external-mux: 44 - xlnx,external-mux-channel: Configures which pair of pins is used to [all …]
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| D | adi,ad7124.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Stefan Popa <stefan.popa@analog.com> 16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf 21 - adi,ad7124-4 22 - adi,ad7124-8 32 clock-names: 34 - const: mclk 40 '#address-cells': [all …]
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| D | ti,tsc2046.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Oleksij Rempel <o.rempel@pengutronix.de> 13 TSC2046 is a touch screen controller with 8 channels ADC. 18 - ti,tsc2046e-adc 26 vref-supply: 29 "#io-channel-cells": 32 '#address-cells': 35 '#size-cells': [all …]
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| D | ti,ads131e08.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs 10 - Jonathan Cameron <jic23@kernel.org> 14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a 15 built-in programmable gain amplifier (PGA), internal reference 24 - ti,ads131e04 25 - ti,ads131e06 26 - ti,ads131e08 [all …]
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| /Documentation/devicetree/bindings/sound/ |
| D | st,sta32x.txt | 7 - compatible: "st,sta32x" 8 - reg: the I2C address of the device for I2C 9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be 12 - power-down-gpios: a GPIO spec for the power down pin. If specified, 16 - Vdda-supply: regulator spec, providing 3.3V 17 - Vdd3-supply: regulator spec, providing 3.3V 18 - Vcc-supply: regulator spec, providing 5V - 26V 22 - clocks, clock-names: Clock specifier for XTI input clock. 24 and disabled when it is removed. The 'clock-names' must be set to 'xti'. 26 - st,output-conf: number, Selects the output configuration: [all …]
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| D | st,sta350.txt | 7 - compatible: "st,sta350" 8 - reg: the I2C address of the device for I2C 9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be 12 - power-down-gpios: a GPIO spec for the power down pin. If specified, 16 - vdd-dig-supply: regulator spec, providing 3.3V 17 - vdd-pll-supply: regulator spec, providing 3.3V 18 - vcc-supply: regulator spec, providing 5V - 26V 22 - st,output-conf: number, Selects the output configuration: 23 0: 2-channel (full-bridge) power, 2-channel data-out 24 1: 2 (half-bridge). 1 (full-bridge) on-board power [all …]
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| D | cs35l35.txt | 5 - compatible : "cirrus,cs35l35" 7 - reg : the I2C address of the device for I2C 9 - VA-supply, VP-supply : power supplies for the device, 13 - interrupts : IRQ line info CS35L35. 14 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt 17 - cirrus,boost-ind-nanohenry: Inductor value for boost converter. The value is 21 - reset-gpios : gpio used to reset the amplifier 23 - cirrus,stereo-config : Boolean to determine if there are 2 AMPs for a 26 - cirrus,audio-channel : Set Location of Audio Signal on Serial Port 27 0 = Data Packet received on Left I2S Channel [all …]
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| D | samsung-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 14 - $ref: dai-common.yaml# 19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. 21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with 25 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for [all …]
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | dma.txt | 4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx 9 - compatible : must include "fsl,elo-dma" 10 - reg : DMA General Status Register, i.e. DGSR which contains 12 - ranges : describes the mapping between the address space of the 14 - cell-index : controller index. 0 for controller @ 0x8100 15 - interrupts : interrupt specifier for DMA IRQ 17 - DMA channel nodes: 18 - compatible : must include "fsl,elo-dma-channel" 20 - reg : DMA channel specific registers 21 - cell-index : DMA channel index starts at 0. [all …]
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| /Documentation/leds/ |
| D | leds-lp5523.rst | 9 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com) 12 ----------- 15 The name of each channel is configurable in the platform data - name and label. 16 There are three options to make the channel name. 20 To make specific channel name, then use 'name' platform data. 22 - /sys/class/leds/R1 (name: 'R1') 23 - /sys/class/leds/B1 (name: 'B1') 27 For one device name with channel number, then use 'label'. 28 - /sys/class/leds/RGB:channelN (label: 'RGB', N: 0 ~ 8) 33 - /sys/class/leds/lp5523:channelN (N: 0 ~ 8) [all …]
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-lp55xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacek Anaszewski <jacek.anaszewski@gmail.com> 11 - Pavel Machek <pavel@ucw.cz> 14 Bindings for the TI/National Semiconductor LP55xx and LP8501 multi channel 27 - national,lp5521 28 - national,lp5523 29 - ti,lp55231 [all …]
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| /Documentation/devicetree/bindings/iio/frequency/ |
| D | adi,admfm2000.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kim Seer Paller <kimseer.paller@analog.com> 15 from 0.5 to 32 GHz and an output IF frequency range from 0.1 to 8 GHz. 22 - adi,admfm2000 24 '#address-cells': 27 '#size-cells': 31 "^channel@[0-1]$": 33 description: Represents a channel of the device. [all …]
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| /Documentation/devicetree/bindings/hwmon/ |
| D | npcm750-pwm-fan.txt | 3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM) 6 The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM) 9 Required properties for pwm-fan node 10 - #address-cells : should be 1. 11 - #size-cells : should be 0. 12 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX. 13 : "nuvoton,npcm845-pwm-fan" for Arbel NPCM8XX. 14 - reg : specifies physical base address and size of the registers. 15 - reg-names : must contain: 18 - clocks : phandle of reference clocks. [all …]
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| D | ti,tmp464.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Guenter Roeck <linux@roeck-us.net> 20 - ti,tmp464 21 - ti,tmp468 26 '#address-cells': 29 '#size-cells': 33 - compatible 34 - reg [all …]
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| D | aspeed-pwm-tacho.txt | 3 The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho 6 There can be upto 8 fans supported. Each fan can have one PWM output and 9 Required properties for pwm-tacho node: 10 - #address-cells : should be 1. 12 - #size-cells : should be 1. 14 - #cooling-cells: should be 2. 16 - reg : address and length of the register set for the device. 18 - pinctrl-names : a pinctrl state named "default" must be defined. 20 - pinctrl-0 : phandle referencing pin configuration of the PWM ports. 22 - compatible : should be "aspeed,ast2400-pwm-tacho" for AST2400 and [all …]
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| /Documentation/driver-api/ |
| D | edac.rst | 5 ---------------------------------------- 8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*, 19 output 4 and 8 bits each (x4, x8). Grouping several of these in parallel 21 typically 72 bits, in order to provide 64 bits + 8 bits of ECC data. 35 * Channel 37 A memory controller channel, responsible to communicate with a group of 38 DIMMs. Each channel has its own independent control (command) and data 43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory 52 * Single-channel 55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using [all …]
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| /Documentation/devicetree/bindings/dma/ |
| D | snps,dma-spear1340.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Viresh Kumar <vireshk@kernel.org> 11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com> 14 - $ref: dma-controller.yaml# 19 - const: snps,dma-spear1340 20 - items: 21 - enum: [all …]
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| /Documentation/devicetree/bindings/net/wireless/ |
| D | mediatek,mt76.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Felix Fietkau <nbd@nbd.name> 12 - Lorenzo Bianconi <lorenzo@kernel.org> 13 - Ryder Lee <ryder.lee@mediatek.com> 25 - mediatek,mt76 26 - mediatek,mt7628-wmac 27 - mediatek,mt7622-wmac [all …]
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