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/Documentation/ABI/testing/
Dsysfs-bus-intel_th-devices-pti6 are 4, 8, 12, 16.
21 - 0: Intel TH clock rate,
22 - 1: 1/2 Intel TH clock rate,
23 - 2: 1/4 Intel TH clock rate,
24 - 3: 1/8 Intel TH clock rate.
/Documentation/admin-guide/
Ddevices.txt13 8 = /dev/random Nondeterministic random number gen.
35 255 = /dev/ptyef 256th PTY master
40 the 1st through 16th series of 16 pseudo-ttys each, and
67 8 = /dev/fd?h1200 5.25" 1200K in a 1200K drive(1)
110 255 = /dev/ttyef 256th PTY slave
198 loop devices is handled by mount(8) or losetup(8).
200 8 block SCSI disk devices (0-15)
260 8 = /dev/smouse Simple serial mouse driver
405 8 = /dev/ntpqic150 QIC-150, no rewind-on-close
438 8 = /dev/sequencer2 Sequencer -- alternate device
[all …]
Drtc.rst49 are reported by interrupt number 8. (Oh! So *that* is what IRQ 8 is
50 for...) It can also function as a 24hr alarm, raising IRQ 8 when the
53 ring on the 30th second of the 30th minute of every hour, for example.
/Documentation/hwmon/
Dmax31827.rst57 temperature rises above the TH value or falls below TL, which is also subject to
63 In interrupt mode exceeding TH also sets OT status to 1, which remains set until
66 exceeding TH and reset, it is set to 1 again only when the temperature drops
68 set again if the temperature rises above TH, and so on. The same logic applies
89 - 125 (ms) = 8 conv/sec
98 - 8 bit -> 8.75 ms conversion time
106 - 1000 mC -> 8 bit
Demc2103.rst25 readings can be divided by a programmable divider (1, 2, 4 or 8) to give
37 this 4th channel when anti-parallel diodes are not fitted.
Ddell-smm-hwmon.rst153 | | | | | | | +-------------- 8. fan0 RPM
230 Description("RunDellDiag"), guid("{F1DDEE52-063C-4784-A11E-8A06684B9B01}")]
255 - 9th bit in ``eax`` indicates Volume up
256 - 10th bit in ``eax`` indicates Volume down
262 - 3th bit in ``eax`` indicates AC connected
287 - 5th bit indicates docking fan
347 fans supports a 4th "magic" state, which signals the BIOS that automatic
349 However there are also some machines who do support a 4th regular fan state too,
/Documentation/virt/kvm/
Dppc-pv.rst47 r6 4th parameter 3rd output value
48 r7 5th parameter 4th output value
49 r8 6th parameter 5th output value
50 r9 7th parameter 6th output value
51 r10 8th parameter 7th output value
52 r11 hypercall number 8th output value
/Documentation/scsi/
Daic79xx.rst90 - When negotiation async via an 8bit WDTR message, send
113 * 1.3.8 (April 29th, 2003)
126 * 1.3.7 (April 16th, 2003)
135 * 1.3.6 (March 28th, 2003)
142 * 1.3.5 (March 24th, 2003)
157 * 1.3.4 (February 28th, 2003)
162 * 1.3.2 (February 19th, 2003)
166 * 1.3.1 (February 11th, 2003)
184 * 1.2.0 (November 14th, 2002)
192 * 1.1.1 (September 24th, 2002)
[all …]
Daic7xxx.rst27 aic7850 10 PCI/32 10MHz 8Bit 3
28 aic7855 10 PCI/32 10MHz 8Bit 3
29 aic7856 10 PCI/32 10MHz 8Bit 3
30 aic7859 10 PCI/32 20MHz 8Bit 3
31 aic7860 10 PCI/32 20MHz 8Bit 3
34 aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8
35 aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8
36 aic7892 20 PCI/64-66 80MHz 16Bit 16 3 4 5 6 7 8
38 aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8
39 aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8
[all …]
/Documentation/userspace-api/media/rc/
Drc-protos.rst57 - 2nd start bit in rc5, re-used as 6th command bit
67 - 8 to 13
78 where there the second stop bit is the 6th command bit, but inverted.
131 after the 8th bit.
168 - 8 to 13
185 The scancode is a 16 bits value, where the address is the lower 8 bits
186 and the command the higher 8 bits; this is reversed from IR order.
230 * - 8
269 * - 8
271 - 8 to 15
[all …]
/Documentation/fb/
Dapi.rst61 per macropixel is not a multiple of 8, whether macropixels are padded to the
62 next multiple of 8 bits or packed together into bytes depends on the visual.
70 the number of bits per macropixel, with plane i'th storing i'th bit from all
78 the number of bits per macropixel, with plane i'th storing i'th bit from all
97 set to 0. When the number of bits per pixel is smaller than 8, several pixels
108 set to 1. When the number of bits per pixel is smaller than 8, several pixels
244 to the desired frame buffer depth. Values up to 8 will usually map to
274 bits per pixel is not a multiple of 8, pixel values are padded to the next
275 multiple of 8 bits.
/Documentation/devicetree/bindings/gpio/
Dsodaville.txt17 8 - active low level-sensitive
41 /* User the 11th GPIO line as an active high triggered
44 interrupts = <11 8>;
/Documentation/input/devices/
Dyealink.rst37 7 8 9 7, 8, 9,
54 NEW REP SU MO TU WE TH FR SA
63 Icon name : NEW REP SU MO TU WE TH FR SA
73 '8' : Generic 7 segment digit with individual addressable segments
153 TH
Dsentelic.rst12 Finger Sensing Pad Intellimouse Mode (scrolling wheel, 4th and 5th buttons)
15 A) MSID 4: Scrolling wheel mode plus Forward page(4th button) and Backward
16 page (5th button)
43 valid values, -8 ~ +7
44 Bit4 => 1 = 4th mouse button is pressed, Forward one page.
45 0 = 4th mouse button is not pressed.
46 Bit5 => 1 = 5th mouse button is pressed, Backward one page.
47 0 = 5th mouse button is not pressed.
78 Bit4 => 1 = 4th mouse button is pressed, Forward one page.
79 0 = 4th mouse button is not pressed.
[all …]
/Documentation/devicetree/bindings/memory-controllers/
Dnuvoton,npcm-memory-controller.yaml18 detection (in-line ECC in which a section (1/8th) of the memory device used to
/Documentation/usb/
Dmisc_usbsevseg.rst11 Both the 6 character and 8 character displays have PRODUCT_ID,
22 For the 8 character display:
46 The device has either 6 or 8 decimal points.
50 For example, to set the 0th and 3rd decimal place
/Documentation/fault-injection/
Dfault-injection.rst238 Write to this file of integer N makes N-th call in the task fail.
514 The following code systematically faults 0-th, 1-st, 2-nd and so on
546 printf("%d-th fault %c: res=%d/%d\n", i, atoi(buf) ? 'N' : 'Y',
556 1-th fault Y: res=-1/23
557 2-th fault Y: res=-1/23
558 3-th fault Y: res=-1/12
559 4-th fault Y: res=-1/12
560 5-th fault Y: res=-1/23
561 6-th fault Y: res=-1/23
562 7-th fault Y: res=-1/23
[all …]
/Documentation/admin-guide/media/
Dcx23885-cardlist.rst49 * - 8
106 - Mygica X8506 DMB-TH
126 - Mygica X8558 PRO DMB-TH
/Documentation/hid/
Dhid-alps.rst28 8 wInputRegister 0003 Identifier to read Input Report
122 8 Xa1_7 Xa1_6 Xa1_5 Xa1_4 Xa1_3 Xa1_2 Xa1_1 Xa1_0
151 X Absolute data of the "n"th finger
153 Y Absolute data of the "n"th finger
155 Operation area of the "n"th finger
/Documentation/admin-guide/pm/
Dcpufreq_drivers.rst37 6th Generation: powernow-k6
39 7th Generation: powernow-k7: Athlon, Duron, Geode.
41 8th Generation: powernow-k8: Athlon, Athlon 64, Opteron, Sempron.
42 Documentation on this functionality in 8th generation processors
/Documentation/userspace-api/media/v4l/
Dpixfmt-srggb10p.rst24 bytes. Each of the first 4 bytes contain the 8 high order bits
25 of the pixels, and the 5th byte contains the 2 least significants
41 :widths: 12 8 8 8 8 68
/Documentation/devicetree/bindings/display/panel/
Dpanel-mipi-dbi-spi.yaml41 - Option 1: 9-bit mode and D/CX as the 9th bit
45 - Option 2: 16-bit mode and D/CX as a 9th bit
49 - Option 3: 8-bit mode and D/CX as a separate interface line
/Documentation/devicetree/bindings/pinctrl/
Dfsl,mxs-pinctrl.txt4 has 32 pins. Each pin has 4 multiplexing functions, and generally, the 4th
34 particular function, like SSP0 functioning as mmc0-8bit. That said, the
85 mmc0_8bit_pins_a: mmc0-8bit@0 {
117 In this example, group node mmc0-8bit defines a group of pins for mxs SSP0
118 to function as a 8-bit mmc device, with 8mA, 3.3V and pull-up configurations
121 node mmc0-8bit defines. Only the configuration properties to be adjusted need
/Documentation/sound/designs/
Dchannel-mapping-api.rst25 third/fourth channels while others that C/LFE as 5th/6th channels.
125 SNDRV_CTL_TLVT_CHMAP_FIXED 8 SNDRV_CHMAP_FL SNDRV_CHMAP_FR
/Documentation/devicetree/bindings/leds/backlight/
Dmediatek,mt6370-backlight.yaml15 4 channels of 8 series WLEDs. Each channel supports up to 30mA of current
49 mediatek,bled-pwm-hys-input-th-steps:

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