Searched full:apmu (Results 1 – 7 of 7) sorted by relevance
| /Documentation/devicetree/bindings/power/ |
| D | renesas,apmu.yaml | 4 $id: http://devicetree.org/schemas/power/renesas,apmu.yaml#
14 Renesas R-Car Gen2 and RZ/G1 SoCs utilize one or more APMU hardware units for
21 - renesas,r8a7742-apmu # RZ/G1H
22 - renesas,r8a7743-apmu # RZ/G1M
23 - renesas,r8a7744-apmu # RZ/G1N
24 - renesas,r8a7745-apmu # RZ/G1E
25 - renesas,r8a77470-apmu # RZ/G1C
26 - renesas,r8a7790-apmu # R-Car H2
27 - renesas,r8a7791-apmu # R-Car M2-W
28 - renesas,r8a7792-apmu # R-Car V2H
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| /Documentation/devicetree/bindings/clock/ |
| D | marvell,pxa1928.txt | 5 blocks called APMU, MPMU, and APBC roughly corresponding to internal buses.
10 - "marvell,pxa1928-apmu" - APMU controller compatible
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| D | marvell,mmp2-clock.yaml | 30 - description: APMU register region
36 - const: apmu
65 reg-names = "mpmu", "apmu", "apbc";
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| D | marvell,pxa168.txt | 13 "mpmu", "apmu", "apbc". So three reg spaces need to be defined.
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| D | marvell,pxa910.txt | 13 "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined.
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| /Documentation/devicetree/bindings/phy/ |
| D | marvell,pxa1928-usb-phy.yaml | 45 clocks = <&apmu PXA1928_CLK_USB>;
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| /Documentation/devicetree/bindings/arm/ |
| D | cpus.yaml | 249 - renesas,apmu
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