Searched full:arc (Results 1 – 25 of 91) sorted by relevance
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| /Documentation/arch/arc/ |
| D | arc.rst | 3 Linux kernel for ARC processors
10 ARC processors and relevant open source projects.
12 - `<https://embarc.org>`_ - Community portal for open source on ARC.
16 - `<https://github.com/foss-for-synopsys-dwc-arc-processors>`_ -
18 ARC processors. Some of the projects are forks of various upstream projects,
21 as open source for use on ARC Processors.
23 - `Official Synopsys ARC Processors website
26 Manual, AKA PRM for ARC HS processors
27 <https://www.synopsys.com/dw/doc.php/ds/cc/programmers-reference-manual-ARC-HS.pdf>`_)
34 Important note on ARC processors configurability
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| D | index.rst | 2 ARC architecture
8 arc
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| D | features.rst | 3 .. kernel-feat:: features arc
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| /Documentation/devicetree/bindings/timer/ |
| D | snps,arc-timer.txt | 1 Synopsys ARC Local Timer with Interrupt Capabilities
2 - Found on all ARC CPUs (ARC700/ARCHS)
4 - Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically
5 TIMER0 used as clockevent provider (true for all ARC cores)
6 TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS)
10 - compatible : should be "snps,arc-timer"
18 compatible = "snps,arc-timer";
25 compatible = "snps,arc-timer";
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| D | snps,archs-rtc.txt | 1 Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
12 compatible = "snps,arc-rtc";
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| D | snps,archs-gfrc.txt | 1 Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
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| /Documentation/devicetree/bindings/leds/backlight/ |
| D | arcxcnn_bl.txt | 4 - compatible: should be "arc,arc2c0608"
14 - arc,led-config-0: setting for register ILED_CONFIG_0
15 - arc,led-config-1: setting for register ILED_CONFIG_1
16 - arc,dim-freq: PWM mode frequence setting (bits [3:0] used)
17 - arc,comp-config: setting for register CONFIG_COMP
18 - arc,filter-config: setting for register FILTER_CONFIG
19 - arc,trim-config: setting for register IMAXTUNE
26 compatible = "arc,arc2c0608";
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | amlogic,meson-mx-ao-arc.yaml | 4 $id: http://devicetree.org/schemas/remoteproc/amlogic,meson-mx-ao-arc.yaml#
7 title: Amlogic Meson AO ARC Remote Processor
10 Amlogic Meson6, Meson8, Meson8b and Meson8m2 SoCs embed an ARC core
12 system suspend. Meson6 and older use a ARC core based on the ARCv1
13 ISA, while Meson8, Meson8b and Meson8m2 use an ARC EM4 (ARCv2 ISA)
23 - amlogic,meson8-ao-arc
24 - amlogic,meson8b-ao-arc
25 - const: amlogic,meson-mx-ao-arc
54 the ARC core. The region should be defined as child nodes of the
78 compatible = "amlogic,meson8-ao-arc", "amlogic,meson-mx-ao-arc";
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| /Documentation/devicetree/bindings/serial/ |
| D | arc-uart.txt | 1 * Synopsys ARC UART : Non standard UART used in some of the ARC FPGA boards
4 - compatible : "snps,arc-uart"
13 compatible = "snps,arc-uart";
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| /Documentation/devicetree/bindings/arc/ |
| D | hsdk.txt | 1 Synopsys DesignWare ARC HS Development Kit Device Tree Bindings
4 ARC HSDK Board with quad-core ARC HS38x4 in silicon.
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| D | snps,archs-pct.yaml | 4 $id: http://devicetree.org/schemas/arc/snps,archs-pct.yaml#
7 title: ARC HS Performance Counters
13 The ARC HS can be configured with a pipeline performance monitor for counting
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| D | pct.txt | 1 * ARC Performance Counters
8 * The ARC 700 PCT does not support interrupts; although HW events may be
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| D | axs101.txt | 1 Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings
7 - compatible = "snps,axs101", "snps,arc-sdp";
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| D | axs103.txt | 1 Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings
8 - compatible = "snps,axs103", "snps,arc-sdp";
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| D | eznps.txt | 7 - compatible = "ezchip,arc-nps";
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| /Documentation/devicetree/bindings/display/ |
| D | snps,arcpgu.txt | 1 ARC PGU
4 by Synopsys. The ARC PGU is an RGB streamer that reads the data from a
12 - clock-names: A list of clock names. For ARC PGU it should contain:
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| /Documentation/devicetree/bindings/serio/ |
| D | snps-arc_ps2.txt | 1 * ARC PS/2 driver: PS/2 block used in some ARC FPGA's & nSIM OSCI model
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | snps,archs-intc.txt | 1 * ARC-HS incore Interrupt Controller (Provided by cores implementing ARCv2 ISA)
12 intc accessed via the special ARC AUX register interface, hence "reg" property
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| D | snps,archs-idu-intc.txt | 1 * ARC-HS Interrupt Distribution Unit
26 The interrupt controller is accessed via the special ARC AUX register
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| D | snps,arc700-intc.txt | 15 intc accessed via the special ARC AUX register interface, hence "reg" property
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| /Documentation/devicetree/bindings/clock/ |
| D | snps,pll-clock.txt | 9 "snps,axs10x-arc-pll-clock"
24 compatible = "snps,axs10x-arc-pll-clock";
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| /Documentation/arch/ |
| D | index.rst | 12 arc/index
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| /Documentation/devicetree/bindings/display/panel/ |
| D | sitronix,st7701.yaml | 27 - anbernic,rg-arc-panel
84 - anbernic,rg-arc-panel
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| /Documentation/features/core/eBPF-JIT/ |
| D | arch-support.txt | 10 | arc: | TODO |
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| /Documentation/features/perf/perf-regs/ |
| D | arch-support.txt | 10 | arc: | TODO |
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