Searched full:asiu (Results 1 – 2 of 2) sorted by relevance
| /Documentation/devicetree/bindings/clock/ |
| D | brcm,iproc-clocks.yaml | 19 ASIU clocks are a special case. These clocks are derived directly from the
30 - brcm,cygnus-asiu-clk
56 - description: ASIU or split status register
59 description: The input parent clock phandle for the PLL / ASIU clock. For
97 - brcm,cygnus-asiu-clk
113 keypad crystal (ASIU) 0 BCM_CYGNUS_ASIU_KEYPAD_CLK
114 adc/tsc crystal (ASIU) 1 BCM_CYGNUS_ASIU_ADC_CLK
115 pwm crystal (ASIU) 2 BCM_CYGNUS_ASIU_PWM_CLK
406 compatible = "brcm,cygnus-asiu-clk";
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | brcm,iproc-gpio.txt | 13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
97 compatible = "brcm,cygnus-asiu-gpio";
118 /* Bluetooth that uses the ASIU GPIO 5, with polarity inverted */
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