Searched full:adjustment (Results 1 – 25 of 61) sorted by relevance
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| /Documentation/networking/ |
| D | ila.rst | 137 adjustment can be precomputed and saved with the mapping.
139 Note that the checksum neutral adjustment affects the low order sixteen
184 adjustment value are not present so an identifier is considered an
193 The checksum neutral adjustment may be configured to always be
195 checksum adjustment is in the low order 16 bits. The identifier is
201 | | Checksum-neutral adjustment |
210 | | Checksum-neutral adjustment |
215 configuration. The checksum neutral adjustment may automatically
221 | | Checksum-neutral adjustment |
230 | | Checksum-neutral adjustment |
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| /Documentation/devicetree/bindings/sound/ |
| D | st,sta350.txt | 42 - st,thermal-warning-adjustment:
43 If present, thermal warning adjustment is enabled.
63 - st,overcurrent-warning-adjustment:
64 If present, overcurrent warning adjustment is enabled.
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| D | st,sta32x.txt | 49 - st,thermal-warning-adjustment:
50 If present, thermal warning adjustment is enabled.
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| /Documentation/devicetree/bindings/net/ |
| D | amlogic,meson-dwmac.yaml | 50 - description: The clock which drives the timing adjustment logic
58 - const: timing-adjustment
174 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
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| D | ti,k3-am654-cpts.yaml | 19 - 64-bit timestamp mode in ns with PPM and nudge adjustment.
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-light-tsl2772 | 12 Causes a recalculation and adjustment to the
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| D | sysfs-class-rtc | 75 adjustment. The unit is parts per billion, i.e. The number of
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| /Documentation/devicetree/bindings/serial/ |
| D | nvidia,tegra20-hsuart.yaml | 61 List of entries providing percentage of baud rate adjustment within a range. Each entry
92 - description: adjustment (in permyriad, i.e. 0.01%)
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| /Documentation/userspace-api/media/drivers/ |
| D | thp7312.rst | 9 Enable/Disable auto-adjustment, based on lighting conditions, of the frame
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| /Documentation/driver-api/ |
| D | dpll.rst | 176 Phase offset measurement and adjustment
185 If pin phase adjustment is supported, minimal and maximal values that pin
194 ``DPLL_A_PIN_PHASE_ADJUST_MIN`` attr minimum value of phase adjustment
195 ``DPLL_A_PIN_PHASE_ADJUST_MAX`` attr maximum value of phase adjustment
197 adjustment on parent dpll device
329 adjustment
331 adjustment
333 adjustment on parent device
358 adjustment on parent device
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| D | ptp.rst | 85 * When other PTP adjustment functions are called, the PHC servo
88 **NOTE:** '.adjphase' is not a simple time adjustment functionality
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | mediatek,mt8183-pinctrl.yaml | 123 can support 0.125/0.25/0.5/1mA adjustment. If we enable specific
171 cycle when asserted (high pulse width adjustment). Valid arguments
178 when asserted (high pulse width adjustment). Valid arguments are
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| D | mediatek,mt8365-pinctrl.yaml | 127 can support 0.125/0.25/0.5/1mA adjustment. If we enable specific
179 cycle when asserted (high pulse width adjustment). Valid arguments
186 when asserted (high pulse width adjustment). Valid arguments are
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| D | mediatek,mt7622-pinctrl.yaml | 343 cycle when asserted (high pulse width adjustment). Valid arguments
350 when asserted (high pulse width adjustment). Valid arguments are
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-rockchip-inno-hdmi.txt | 21 for adjustment to some frequency settings
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| /Documentation/hwmon/ |
| D | pc87427.rst | 62 temperature format, so user-space adjustment (typically by a factor 2)
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| /Documentation/devicetree/bindings/clock/ |
| D | baikal,bt1-ccu-pll.yaml | 72 output clock, BWADJ is the PLL bandwidth adjustment parameter. At this moment
74 requested rate, while bypassing and bandwidth adjustment settings can be
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| /Documentation/userspace-api/ |
| D | sysfs-platform_profile.rst | 11 These auto platform adjustment mechanisms often can be configured with
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| /Documentation/devicetree/bindings/usb/ |
| D | snps,dwc3.yaml | 294 snps,quirk-frame-length-adjustment:
297 length adjustment when the fladj_30mhz_sdbnd signal is invalid or
422 snps,incr-burst-type-adjustment:
481 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
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| D | chipidea,usb2-imx.yaml | 112 HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
121 HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times
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| D | amlogic,meson-g12a-usb-ctrl.yaml | 235 snps,quirk-frame-length-adjustment = <0x20>;
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| /Documentation/virt/kvm/ |
| D | halt-polling.rst | 69 It is worth noting that this adjustment process attempts to hone in on some
72 adjustment of the polling interval.
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| /Documentation/devicetree/bindings/power/supply/ |
| D | bq25890.yaml | 86 description: max. charging voltage adjustment due to expected voltage drop on in-series resistor
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| /Documentation/misc-devices/ |
| D | lis3lv02d.rst | 53 to allow adjustment of the limits without a change to the actual driver.
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| /Documentation/devicetree/bindings/ptp/ |
| D | fsl,ptp.yaml | 84 Maximum frequency adjustment in parts per billion.
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