Searched full:altera (Results 1 – 25 of 43) sorted by relevance
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1 Altera Passive Serial SPI FPGA Manager3 Altera FPGAs support a method of loading the bitstream over what is8 See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
7 title: Altera Freeze Bridge Controller10 The Altera Freeze Bridge Controller manages one or more freeze bridges.
1 Altera Arria10 Partial Reconfiguration IP
1 Altera SOCFPGA FPGA Manager
1 Altera SOCFPGA Arria10 FPGA Manager
7 title: Altera FPGA To SDRAM Bridge
7 title: Altera FPGA/HPS Bridge
1 * Altera I2C Controller2 * This is Altera's synthesizable logic block I2C Controller for use3 * in Altera's FPGAs.
1 What: /sys/bus/pci/drivers/altera-cvp/chkcfg7 error checking in altera-cvp driver is turned on or
4 Contact: Alan Tull <atull@opensource.altera.com>10 Contact: Alan Tull <atull@opensource.altera.com>
6 Altera Triple-Speed Ethernet MAC driver9 Copyright |copy| 2008-2014 Altera Corporation11 This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers19 For more information visit www.altera.com and www.rocketboards.org. Support25 components that can be assembled and built into an FPGA using the Altera44 visit www.altera.com for known, documented SGDMA errata.61 Altera Triple-Speed Ethernet MAC support (ALTERA_TSE)147 RFC defined statistics, and driver or Altera defined statistics. The four154 - Altera Triple Speed Ethernet User Guide, found at http://www.altera.com274 Altera TSE. This statistics counts the number of received good and errored[all …]
4 $id: http://devicetree.org/schemas/arm/altera/socfpga-clk-manager.yaml#7 title: Altera SOCFPGA Clock Manager
1 Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
1 Altera SOCFPGA System Manager
13 http://www.altera.com/literature/lit-nio2.jsp18 Altera family of FPGAs. In order to support Linux, Nios II needs to be configured
7 title: Altera mSGDMA IP core13 Altera / Intel modular Scatter-Gather Direct Memory Access (mSGDMA)
1 Altera GPIO controller bindings17 hardware is synthesized. This field is required if the Altera GPIO controller
4 $id: http://devicetree.org/schemas/arm/altera.yaml#7 title: Altera's SoCFPGA platform
1 Altera JTAG UART
1 Altera UART
1 Altera SPI
1 Altera UP PS/2 controller
1 Altera Timer
16 altera/altera_tse