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/Documentation/devicetree/bindings/interrupt-controller/
Dfsl,mu-msi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
16 for one processor (A side) to signal the other processor (B side) using
20 different clocks (from each side of the different peripheral buses).
21 Therefore, the MU must synchronize the accesses from one side to the
23 registers (Processor A-side, Processor B-side).
28 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
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/Documentation/networking/
Dsnmp_counter.rst17 .. _RFC1213 ipInReceives: https://tools.ietf.org/html/rfc1213#page-26
30 .. _RFC1213 ipInDelivers: https://tools.ietf.org/html/rfc1213#page-28
41 .. _RFC1213 ipOutRequests: https://tools.ietf.org/html/rfc1213#page-28
60 .. _Explicit Congestion Notification: https://tools.ietf.org/html/rfc3168#page-6
73 .. _RFC1213 ipInHdrErrors: https://tools.ietf.org/html/rfc1213#page-27
81 .. _RFC1213 ipInAddrErrors: https://tools.ietf.org/html/rfc1213#page-27
98 .. _RFC1213 ipInUnknownProtos: https://tools.ietf.org/html/rfc1213#page-27
111 .. _RFC1213 ipInDiscards: https://tools.ietf.org/html/rfc1213#page-28
118 .. _RFC1213 ipOutDiscards: https://tools.ietf.org/html/rfc1213#page-28
125 .. _RFC1213 ipOutNoRoutes: https://tools.ietf.org/html/rfc1213#page-29
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Dphy.rst11 partner on the other side of the network connection (typically, an ethernet
26 #. Increase code-reuse
27 #. Increase overall code-maintainability
67 for one of the users. (e.g. "git grep fsl,.*-mdio arch/powerpc/boot/dts/")
72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin
84 or the PCB traces insert the correct 1.5-2ns delay
95 Whenever possible, use the PHY side RGMII delay for these reasons:
97 * PHY devices may offer sub-nanosecond granularity in how they allow a
98 receiver/transmitter side delay (e.g: 0.5, 1.0, 1.5ns) to be specified. Such
113 side delay from the perspective of the PHY device. Conversely, if the Ethernet
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/Documentation/RCU/
DUP.rst16 --------------------------
18 Suppose that an RCU-based algorithm scans a linked list containing
19 elements A, B, and C in process context, and can delete elements from
20 this same list in softirq context. Suppose that the process-context scan
21 is referencing element B when it is interrupted by softirq processing,
22 which deletes element B, and then invokes call_rcu() to free element B
27 element B. This situation can greatly decrease the life expectancy of
33 Example 2: Function-Call Fatality
34 ---------------------------------
40 Suppose that an RCU-based algorithm again scans a linked list containing
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Dchecklist.rst1 .. SPDX-License-Identifier: GPL-2.0
14 0. Is RCU being applied to a read-mostly situation? If the data
18 tool for the job. Yes, RCU does reduce read-side overhead by
19 increasing write-side overhead, which is exactly why normal uses
27 Yet another exception is where the low real-time latency of RCU's
28 read-side primitives is critically important.
33 counter-intuitive situation where rcu_read_lock() and
44 b. atomic operations, or
47 If you choose #b, be prepared to describe how you have handled
49 them -- even x86 allows later loads to be reordered to precede
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Drcu_dereference.rst17 (prefix "*"), field selection ("->"), assignment ("="), address-of
27 - You must use one of the rcu_dereference() family of primitives
28 to load an RCU-protected pointer, otherwise CONFIG_PROVE_RCU
29 will complain. Worse yet, your code can see random memory-corruption
45 - In the special case where data is added but is never removed
51 - You are only permitted to use rcu_dereference() on pointer values.
57 - Set bits and clear bits down in the must-be-zero low-order
62 - XOR bits to translate pointers, as is done in some
63 classic buddy-allocator algorithms.
68 - Avoid cancellation when using the "+" and "-" infix arithmetic
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DwhatisRCU.rst3 What is RCU? -- "Read, Copy, Update"
21 …ries: Fundamentals https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries
22 …Cases https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries-additional-use-cases
28 during the 2.5 development effort that is optimized for read-mostly
47 :ref:`6. ANALOGY WITH READER-WRITER LOCKING <6_whatisRCU>`
67 everything, feel free to read the whole thing -- but if you are really
69 never need this document anyway. ;-)
74 ----------------
103 b. Wait for all previous readers to complete their RCU read-side
110 Step (b) above is the key idea underlying RCU's deferred destruction.
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Drcuref.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Reference-count design for elements of lists/arrays protected by RCU
8 Please note that the percpu-ref feature is likely your first
10 include/linux/percpu-refcount.h for more information. However, in
11 those unusual cases where percpu-ref would consume too much memory,
14 ------------------------------------------------------------------------
26 atomic_set(&el->rc, 1); atomic_inc(&el->rc);
37 if(atomic_dec_and_test(&el->rc)) ...
42 if (atomic_dec_and_test(&el->rc))
54 CODE LISTING B::
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/Documentation/devicetree/bindings/mailbox/
Dfsl,mu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
19 different clocks (from each side of the different peripheral buses).
20 Therefore, the MU must synchronize the accesses from one side to the
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8ulp-mu
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/Documentation/staging/
Dspeculation.rst8 ------------------------------------------------------------------------------
17 absence of data in caches. Such state may form side-channels which can be
35 B.LT less
42 It is possible that a CPU mis-predicts the conditional branch, and
62 of an out-of-bounds address, while the second call will influence
67 Mitigating speculation side-channels
72 speculation-based side-channels are expected to implement these
76 prevent information from being leaked via side-channels.
/Documentation/RCU/Design/Requirements/
DRequirements.rst16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
53 ------------------------
58 #. `Grace-Period Guarantee`_
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/Documentation/arch/arm/
Dcluster-pm-race-avoidance.rst2 Cluster-wide Power-up/power-down race avoidance algorithm
16 ---------
29 cluster-level operations are only performed when it is truly safe to do
35 disabling those mechanisms may itself be a non-atomic operation (such as
38 power-down and power-up at the cluster level.
46 -----------
50 - DOWN
51 - COMING_UP
52 - UP
53 - GOING_DOWN
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/Documentation/usb/
Dchipidea.rst6 -----------------------------------
12 -------------------------
29 otg-rev = <0x0200>;
30 adp-disable;
33 -------------------
39 is micro B plug.
41 The A-device (with micro A plug inserted) should enumerate B-device.
45 On B-device::
49 B-device should take host role and enumerate A-device.
51 4) A-device switch back to host.
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Dmass-storage.rst9 appearing to the host as a disk or a CD-ROM drive. It supports
12 to read-only, and gadget can indicate that it is removable and/or
13 CD-ROM (the latter implies read-only access).
15 Its requirements are modest; only a bulk-in and a bulk-out endpoint
17 Support is included for full-speed, high-speed and SuperSpeed
20 Note that the driver is slightly non-portable in that it assumes
21 a single memory/DMA buffer will be usable for bulk-in and bulk-out
38 - file=filename[,filename...]
49 the host side, the contents are not well defined.
53 simulating CD-ROM, block size of the device if the backing file is
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/Documentation/devicetree/bindings/usb/
Donnn,nb7vpq904m.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ON Semiconductor Type-C DisplayPort ALT Mode Linear Redriver
10 - Neil Armstrong <neil.armstrong@linaro.org>
15 - onnn,nb7vpq904m
20 vcc-supply:
23 enable-gpios: true
24 orientation-switch: true
25 retimer-switch: true
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/Documentation/sound/cards/
Daudigy-mixer.rst5 This is based on sb-live-mixer.rst.
20 functionality. Only the default built-in code in the ALSA driver is described
34 one-way three wire serial bus for digital sound by Philips Semiconductors
42 FX-bus
48 ----------------------------------------
49 This control is used to attenuate samples from left and right front PCM FX-bus
54 -------------------------------------------
55 This control is used to attenuate samples from left and right surround PCM FX-bus
60 name='PCM Side Playback Volume',index=0
61 ---------------------------------------
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/Documentation/driver-api/cxl/
Dmaturity-map.rst1 .. SPDX-License-Identifier: GPL-2.0
9 <https://computeexpresslink.org/cxl-specification-landing-page>`_ that
14 <https://lore.kernel.org/linux-cxl/?q=s%3APULL+s%3ACXL+tc%3Atorvalds+NOT+s%3ARe>`_,
20 the change-history of this document provides an overview summary of the
25 - [3] Mature: Work in this area is complete and no changes on the horizon.
29 - [2] Stabilizing: Major functionality operational, common cases are
32 - [1] Initial: Capability that has exited the Proof of Concept phase, but
36 - [0] Known gap: Feature is on a medium to long term horizon to
39 the linux-cxl@vger.kernel.org community has started to look at it.
41 - X: Out of scope for kernel enabling, or kernel enabling not required
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/Documentation/arch/x86/
Dearlyprintk.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Mini-HOWTO for using the earlyprintk=dbgp boot option with a
13 [host/target] <-------> [USB debug key] <-------> [client/console]
21 the lspci -vvv output::
23 # lspci -vvv
25 …roller: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #1 (rev 03) (prog-if 20 [EHCI])
27 …Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisIN…
28 …Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- I…
31 Region 0: Memory at fe227000 (32-bit, non-prefetchable) [size=1K]
33 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
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Dpti.rst1 .. SPDX-License-Identifier: GPL-2.0
27 This approach helps to ensure that side-channel attacks leveraging
30 time. Once enabled at compile-time, it can be disabled at boot with
31 the 'nopti' or 'pti=' kernel parameters (see kernel-parameters.txt).
43 that any missed kernel->user CR3 switch will immediately crash
49 each CPU's copy of the area a compile-time-fixed virtual address.
65 Protection against side-channel attacks is important. But,
70 a. Each process now needs an order-1 PGD instead of order-0.
72 b. The 'cpu_entry_area' structure must be 2MB in size and 2MB
84 b. Percpu TSS is mapped into the user page tables to allow SYSCALL64 path
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/Documentation/dev-tools/
Dkfence.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Kernel Electric-Fence (KFENCE)
7 Kernel Electric-Fence (KFENCE) is a low-overhead sampling-based memory safety
8 error detector. KFENCE detects heap out-of-bounds access, use-after-free, and
9 invalid-free errors.
15 non-production test workloads. One way to quickly achieve a large enough total
19 -----
26 ``kfence.sample_interval`` to non-zero value), configure the kernel with::
46 causes CPU wake-ups when the system is completely idle. This may be undesirable
47 on power-constrained systems. The boot parameter ``kfence.deferrable=1``
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/Documentation/devicetree/bindings/net/
Dhisilicon-hns-nic.txt4 - compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
5 "hisilicon,hns-nic-v1" is for hip05.
6 "hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
7 - ae-handle: accelerator engine handle for hns,
9 see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
17 port-id can be 2 to 7. Here is the diagram:
18 +-----+---------------+
20 +-+-+-+---+-+-+-+-+-+-+
24 (0,1) (2-7)
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/Documentation/arch/sparc/oradax/
Ddax-hv-api.txt3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
16 live-migration and other system management activities.
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device
51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility
54 • No-op/Sync
81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility
82 … "ORCL,sun4v-dax-fc" is compatible with the "ORCL,sun4v-dax" interface, and includes additional CCB
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/Documentation/devicetree/bindings/i2c/
Dgoogle,cros-ec-i2c-tunnel.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $id: http://devicetree.org/schemas/i2c/google,cros-ec-i2c-tunnel.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: I2C bus that tunnels through the ChromeOS EC (cros-ec)
11 - Doug Anderson <dianders@chromium.org>
12 - Benson Leung <bleung@chromium.org>
17 other side of the EC (like a battery and PMIC). To get access to
20 The node for this device should be under a cros-ec node like
21 google,cros-ec-spi or google,cros-ec-i2c.
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Di2c-arb-gpio-challenge.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-arb-gpio-challenge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
10 - Doug Anderson <dianders@chromium.org>
11 - Peter Rosin <peda@axentia.se>
18 standard I2C multi-master rules. Using GPIOs is generally useful in the case
30 others can see. These are all active low with pull-ups enabled. We'll
36 sure that the other side doesn't want it also. A detailed explanation is
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/Documentation/input/devices/
Dwalkera0701.rst2 Walkera WK-0701 transmitter
5 Walkera WK-0701 transmitter is supplied with a ready to fly Walkera
10 http://zub.fei.tuke.sk/walkera-wk0701/
13 cg-clone http://zub.fei.tuke.sk/GIT/walkera0701-joystick
19 At back side of transmitter S-video connector can be found. Modulation
26 Walkera WK-0701 TX S-VIDEO connector::
28 (back side of TX)
29 __ __ S-video: canon25
34 | [___] | |/| B |\
35 ------- 3 __________________________________|________________ 25 GND
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