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/Documentation/ABI/testing/
Dsysfs-bus-i3c1 What: /sys/bus/i3c/devices/i3c-<bus-id>
5 An I3C bus. This directory will contain one sub-directory per
6 I3C device present on the bus.
8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master
12 Expose the master that owns the bus (<bus-id>-<master-pid>) at
13 the time this file is read. Note that bus ownership can change
17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode
21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See
25 What: /sys/bus/i3c/devices/i3c-<bus-id>/i3c_scl_frequency
32 What: /sys/bus/i3c/devices/i3c-<bus-id>/i2c_scl_frequency
[all …]
Dsysfs-bus-soundwire-slave1 What: /sys/bus/soundwire/devices/sdw:.../status
2 /sys/bus/soundwire/devices/sdw:.../device_number
16 physically present on the bus, and conversely devices
19 What: /sys/bus/soundwire/devices/sdw:.../dev-properties/mipi_revision
20 /sys/bus/soundwire/devices/sdw:.../dev-properties/wake_capable
21 /sys/bus/soundwire/devices/sdw:.../dev-properties/test_mode_capable
22 /sys/bus/soundwire/devices/sdw:.../dev-properties/clk_stop_mode1
23 /sys/bus/soundwire/devices/sdw:.../dev-properties/simple_clk_stop_capable
24 /sys/bus/soundwire/devices/sdw:.../dev-properties/clk_stop_timeout
25 /sys/bus/soundwire/devices/sdw:.../dev-properties/ch_prep_timeout
[all …]
Dsysfs-bus-mdio1 What: /sys/bus/mdio_bus/devices/.../statistics/
8 MDIO bus address statistics.
10 What: /sys/bus/mdio_bus/devices/.../statistics/transfers
16 Total number of transfers for this MDIO bus.
18 What: /sys/bus/mdio_bus/devices/.../statistics/errors
24 Total number of transfer errors for this MDIO bus.
26 What: /sys/bus/mdio_bus/devices/.../statistics/writes
32 Total number of write transactions for this MDIO bus.
34 What: /sys/bus/mdio_bus/devices/.../statistics/reads
40 Total number of read transactions for this MDIO bus.
[all …]
Dsysfs-bus-cdx1 What: /sys/bus/cdx/rescan
5 Writing y/1/on to this file will cause rescan of the bus
6 and devices on the CDX bus. Any new devices are scanned and
12 # echo 1 > /sys/bus/cdx/rescan
14 What: /sys/bus/cdx/devices/.../vendor
22 What: /sys/bus/cdx/devices/.../device
31 What: /sys/bus/cdx/devices/.../subsystem_vendor
39 What: /sys/bus/cdx/devices/.../subsystem_device
47 What: /sys/bus/cdx/devices/.../class
54 What: /sys/bus/cdx/devices/.../revision
[all …]
Dsysfs-driver-ccp1 What: /sys/bus/pci/devices/<BDF>/fused_part
6 The /sys/bus/pci/devices/<BDF>/fused_part file reports
11 What: /sys/bus/pci/devices/<BDF>/debug_lock_on
16 The /sys/bus/pci/devices/<BDF>/debug_lock_on reports
22 What: /sys/bus/pci/devices/<BDF>/tsme_status
27 The /sys/bus/pci/devices/<BDF>/tsme_status file reports
33 What: /sys/bus/pci/devices/<BDF>/anti_rollback_status
38 The /sys/bus/pci/devices/<BDF>/anti_rollback_status file reports
44 What: /sys/bus/pci/devices/<BDF>/rpmc_production_enabled
49 The /sys/bus/pci/devices/<BDF>/rpmc_production_enabled file reports
[all …]
Dsysfs-platform-chipidea-usb-otg1 What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_req
6 Set a_bus_req(A-device bus request) input to be 1 if
7 the application running on the A-device wants to use the bus,
9 the bus(or wants to work as peripheral). a_bus_req can also
11 from the B-device, the A-device should decide to resume the bus.
16 is using the bus as host role, otherwise 0.
18 What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_drop
23 The a_bus_drop(A-device bus drop) input is 1 when the
25 the bus, and is 0 otherwise, When a_bus_drop is 1, then
30 Reading: returns 1 if the bus is off(vbus is turned off) by
[all …]
Dsysfs-driver-ufs1 What: /sys/bus/*/drivers/ufshcd/*/auto_hibern8
15 What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/device_type
16 What: /sys/bus/platform/devices/*.ufs/device_descriptor/device_type
25 What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/device_class
26 What: /sys/bus/platform/devices/*.ufs/device_descriptor/device_class
35 What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/device_sub_class
36 What: /sys/bus/platform/devices/*.ufs/device_descriptor/device_sub_class
45 What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/protocol
46 What: /sys/bus/platform/devices/*.ufs/device_descriptor/protocol
56 What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/number_of_luns
[all …]
Dsysfs-driver-chromeos-acpi1 What: /sys/bus/platform/devices/GGL0001:*/BINF.2
2 /sys/bus/platform/devices/GOOG0016:*/BINF.2
13 What: /sys/bus/platform/devices/GGL0001:*/BINF.3
14 /sys/bus/platform/devices/GOOG0016:*/BINF.3
27 What: /sys/bus/platform/devices/GGL0001:*/CHSW
28 /sys/bus/platform/devices/GOOG0016:*/CHSW
43 What: /sys/bus/platform/devices/GGL0001:*/FMAP
44 /sys/bus/platform/devices/GOOG0016:*/FMAP
51 What: /sys/bus/platform/devices/GGL0001:*/FRID
52 /sys/bus/platform/devices/GOOG0016:*/FRID
[all …]
Dsysfs-bus-coresight-devices-cti1 What: /sys/bus/coresight/devices/<cti-name>/enable
7 What: /sys/bus/coresight/devices/<cti-name>/powered
13 What: /sys/bus/coresight/devices/<cti-name>/ctmid
19 What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons
25 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name
31 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals
37 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_types
44 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_signals
50 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_types
57 What: /sys/bus/coresight/devices/<cti-name>/regs/inout_sel
[all …]
Dsysfs-bus-usb1 What: /sys/bus/usb/devices/<INTERFACE>/authorized
9 by writing INTERFACE to /sys/bus/usb/drivers_probe
15 What: /sys/bus/usb/devices/usbX/interface_authorized_default
22 What: /sys/bus/usb/device/.../authorized
31 What: /sys/bus/usb/drivers/.../new_id
48 # echo "8086 10f5" > /sys/bus/usb/drivers/foo/new_id
53 # echo "0458 7045 0 0458 704c" > /sys/bus/usb/drivers/foo/new_id
59 # cat /sys/bus/usb/drivers/foo/new_id
67 What: /sys/bus/usb-serial/drivers/.../new_id
72 extra bus folder "usb-serial" in sysfs; apart from that
[all …]
Dsysfs-driver-qat_rl1 What: /sys/bus/pci/devices/<BDF>/qat_rl/sla_op
36 What: /sys/bus/pci/devices/<BDF>/qat_rl/rp
64 # echo 4 > /sys/bus/pci/devices/<BDF>/qat_rl/id
65 # cat /sys/bus/pci/devices/<BDF>/qat_rl/rp
69 # echo 0x5 > /sys/bus/pci/devices/<BDF>/qat_rl/rp
73 What: /sys/bus/pci/devices/<BDF>/qat_rl/id
94 # echo "add" > /sys/bus/pci/devices/<BDF>/qat_rl/sla_op
95 # cat /sys/bus/pci/devices/<BDF>/qat_rl/id
99 # echo 7 > /sys/bus/pci/devices/<BDF>/qat_rl/id
100 # echo "get" > /sys/bus/pci/devices/<BDF>/qat_rl/sla_op
[all …]
Dsysfs-bus-soundwire-master1 What: /sys/bus/soundwire/devices/sdw-master-<N>/revision
2 /sys/bus/soundwire/devices/sdw-master-<N>/clk_stop_modes
3 /sys/bus/soundwire/devices/sdw-master-<N>/clk_freq
4 /sys/bus/soundwire/devices/sdw-master-<N>/clk_gears
5 /sys/bus/soundwire/devices/sdw-master-<N>/default_col
6 /sys/bus/soundwire/devices/sdw-master-<N>/default_frame_rate
7 /sys/bus/soundwire/devices/sdw-master-<N>/default_row
8 /sys/bus/soundwire/devices/sdw-master-<N>/dynamic_shape
9 /sys/bus/soundwire/devices/sdw-master-<N>/err_threshold
10 /sys/bus/soundwire/devices/sdw-master-<N>/max_clk_freq
[all …]
Dsysfs-bus-coresight-devices-etm4x1 What: /sys/bus/coresight/devices/etm<N>/enable_source
11 What: /sys/bus/coresight/devices/etm<N>/cpu
17 What: /sys/bus/coresight/devices/etm<N>/nr_pe_cmp
24 What: /sys/bus/coresight/devices/etm<N>/nr_addr_cmp
31 What: /sys/bus/coresight/devices/etm<N>/nr_cntr
38 What: /sys/bus/coresight/devices/etm<N>/nr_ext_inp
44 What: /sys/bus/coresight/devices/etm<N>/numcidc
51 What: /sys/bus/coresight/devices/etm<N>/numvmidc
58 What: /sys/bus/coresight/devices/etm<N>/nrseqstate
65 What: /sys/bus/coresight/devices/etm<N>/nr_resource
[all …]
Dsysfs-bus-counter1 What: /sys/bus/counter/devices/counterX/cascade_counts_enable
9 What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select
24 What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select_available
31 What: /sys/bus/counter/devices/counterX/countY/count
37 What: /sys/bus/counter/devices/counterX/countY/capture
43 What: /sys/bus/counter/devices/counterX/countY/ceiling
50 What: /sys/bus/counter/devices/counterX/countY/floor
57 What: /sys/bus/counter/devices/counterX/countY/count_mode
147 What: /sys/bus/counter/devices/counterX/countY/count_mode_available
148 What: /sys/bus/counter/devices/counterX/countY/error_noise_available
[all …]
/Documentation/i2c/
Di2c-sysfs.rst12 kernel abstracts the MUX channels into logical I2C bus numbers. However, there
13 is a gap of knowledge to map from the I2C bus physical number and MUX topology
14 to logical I2C bus number. This doc is aimed to fill in this gap, so the
38 so you can find the I2C Sysfs under ``/sys/bus/i2c/devices``
43 the first number is I2C bus number, and the second number is I2C address.
47 blueline:/sys/bus/i2c/devices $ ls
51 ``i2c-2`` is an I2C bus whose number is 2, and ``2-0049`` is an I2C device
52 on bus 2 address 0x49 bound with a kernel driver.
59 (Physical) I2C Bus Controller
63 physical I2C bus controllers. The controllers are hardware and physical, and the
[all …]
/Documentation/devicetree/bindings/bus/
Dsimple-pm-bus.yaml4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml#
7 title: Simple Power-Managed Bus
13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real
16 However, its bus controller is part of a PM domain, or under the control
17 of a functional clock. Hence, the bus controller's PM domain and/or
18 clock must be enabled for child devices connected to the bus (either
21 While "simple-pm-bus" follows the "simple-bus" set of properties, as
23 "simple-bus".
27 pattern: "^bus(@[0-9a-f]+)?$"
31 const: simple-pm-bus
[all …]
Dfsl,spba-bus.yaml4 $id: http://devicetree.org/schemas/bus/fsl,spba-bus.yaml#
7 title: Shared Peripherals Bus Interface
13 A simple bus enabling access to shared peripherals.
15 The "spba-bus" follows the "simple-bus" set of properties, as
17 "simple-bus" because the SDMA controller uses this compatible flag to
19 the SDMA can access. There are no special clocks for the bus, because
26 const: fsl,spba-bus
32 pattern: "^spba-bus(@[0-9a-f]+)?$"
36 - const: fsl,spba-bus
37 - const: simple-bus
[all …]
Dsocionext,uniphier-system-bus.yaml4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
7 title: UniPhier System Bus
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
14 Before any access to the bus, the bus controller must be configured; the bus
18 be optimized for faster bus access.
25 const: socionext,uniphier-system-bus
41 Provide address translation from the System Bus to the parent bus.
44 The address region(s) that can be assigned for the System Bus is
58 work. The software should initialize the bus controller according to it.
[all …]
Drenesas,bsc.yaml3 $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml#
6 title: Renesas Bus State Controller (BSC)
12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
13 Bridge", or "External Bus Interface") can be found in several Renesas ARM
14 SoCs. It provides an external bus for connecting multiple external
18 While the BSC is a fairly simple memory-mapped bus, it may be part of a
24 The bindings for the BSC extend the bindings for "simple-pm-bus".
27 - $ref: simple-pm-bus.yaml#
36 - {} # simple-pm-bus, but not listed here to avoid false select
53 bsc: bus@fec10000 {
[all …]
/Documentation/driver-api/driver-model/
Dbus.rst2 Bus Types
9 int bus_register(struct bus_type * bus);
15 Each bus type in the kernel (PCI, USB, etc) should declare one static
32 When a bus driver is initialized, it calls bus_register. This
33 initializes the rest of the fields in the bus object and inserts it
34 into a global list of bus types. Once the bus object is registered,
35 the fields in it are usable by the bus driver.
45 them are inherently bus-specific. Drivers typically declare an array
46 of device IDs of devices they support that reside in a bus-specific
49 The purpose of the match callback is to give the bus an opportunity to
[all …]
Dporting.rst16 at the bus driver layer. This was intentional, to minimize the
18 of bus drivers.
21 be embedded in larger, bus-specific objects. Fields in these generic
22 objects can replace fields in the bus-specific objects.
36 Step 1: Registering the bus driver.
39 - Define a struct bus_type for the bus driver::
46 - Register the bus type.
48 This should be done in the initialization function for the bus type,
59 The bus type may be unregistered (if the bus driver may be compiled
65 - Export the bus type for others to use.
[all …]
/Documentation/devicetree/bindings/arm/omap/
Dl4.txt3 These bindings describe the OMAP SoCs L4 interconnect bus.
6 - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
7 Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
8 Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
9 Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus
10 Should be "ti,omap4-l4-per" for OMAP4 family l4 per bus
11 Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus
12 Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus
13 Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus
14 Should be "ti,dra7-l4-cfg" for DRA7 family l4 cfg bus
[all …]
/Documentation/driver-api/soundwire/
Dlocking.rst5 This document explains locking mechanism of the SoundWire Bus. Bus uses
6 following locks in order to avoid race conditions in Bus operations on
9 - Bus lock
13 Bus lock
16 SoundWire Bus lock is a mutex and is part of Bus data structure
17 (sdw_bus) which is used for every Bus instance. This lock is used to
18 serialize each of the following operations(s) within SoundWire Bus instance.
30 Bus data structure (sdw_bus). This lock is used to serialize the message
31 transfers (read/write) within a SoundWire Bus instance.
45 Bus in case of bank switch.
[all …]
/Documentation/devicetree/bindings/interconnect/
Dsamsung,exynos-bus.yaml4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml#
7 title: Samsung Exynos SoC Bus and Interconnect
16 Generally, each bus of Exynos SoC includes a source clock and a power line,
17 which are able to change the clock frequency of the bus in runtime. To
18 monitor the usage of each bus in runtime, the driver uses the PPMU (Platform
22 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
23 The each AXI bus has the owned source clock but, has not the only owned power
26 type of bus devices as following::
27 - parent bus device
28 - passive bus device
[all …]
/Documentation/scsi/
Dadvansys.rst8 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
10 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
11 transfer) SCSI Host Adapters for the PCI bus.
21 - ABP-480 - Bus-Master CardBus (16 CDB)
24 - ABP510/5150 - Bus-Master ISA (240 CDB)
25 - ABP5140 - Bus-Master ISA PnP (16 CDB)
26 - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
27 - ABP902/3902 - Bus-Master PCI (16 CDB)
28 - ABP3905 - Bus-Master PCI (16 CDB)
29 - ABP915 - Bus-Master PCI (16 CDB)
[all …]

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