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/Documentation/translations/zh_CN/scheduler/
Dsched-energy.rst152 CPU0 CPU1 CPU2 CPU3
169 * CPU2: 600 / 768 * 800 = 625
177 CPU0 CPU1 CPU2 CPU3
187 PP * CPU2: 600 / 768 * 800 = 625
195 CPU0 CPU1 CPU2 CPU3
204 * CPU2: 600 / 768 * 800 = 625
212 CPU0 CPU1 CPU2 CPU3
/Documentation/translations/zh_CN/core-api/irq/
Dirq-affinity.rst46 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
64 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
/Documentation/core-api/irq/
Dirq-affinity.rst38 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
57 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
/Documentation/devicetree/bindings/cpu/
Dcpu-topology.txt205 cpu = <&CPU2>;
292 CPU2: cpu@100 {
420 cpu = <&CPU2>;
455 CPU2: cpu@2 {
511 cpu = <&CPU2>;
514 cpu0 = <&CPU2>;
529 CPU2: cpu@2 {
Dcpu-capacity.txt218 cpu2: cpu@2 {
/Documentation/scheduler/
Dsched-energy.rst152 composed of two CPUs each. CPU0 and CPU1 are little CPUs; CPU2 and CPU3
179 CPU0 CPU1 CPU2 CPU3
199 * CPU2: 600 / 768 * 800 = 625
207 CPU0 CPU1 CPU2 CPU3
217 PP * CPU2: 600 / 768 * 800 = 625
225 CPU0 CPU1 CPU2 CPU3
235 * CPU2: 600 / 768 * 800 = 625
243 CPU0 CPU1 CPU2 CPU3
/Documentation/translations/zh_CN/infiniband/
Dcore_locking.rst86 CPU1 CPU2
/Documentation/devicetree/bindings/arm/
Darm,cci-400.yaml138 * {CPU2, CPU3};
159 CPU2: cpu@100 {
/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-mediatek.txt210 cpu2: cpu@100 {
242 &cpu2 {
Dqcom-cpufreq-nvmem.yaml148 CPU2: cpu@102 {
Dcpufreq-qcom-hw.yaml258 CPU2: cpu@200 {
/Documentation/arch/powerpc/
Dvcpudispatch_stats.rst52 cpu2 2317 1198 1109 10 0 2312 5 0
/Documentation/devicetree/bindings/opp/
Dopp-v2-kryo-cpu.yaml150 CPU2: cpu@100 {
198 cpu = <&CPU2>;
/Documentation/infiniband/
Dcore_locking.rst82 CPU1 CPU2
/Documentation/admin-guide/
Dcputopology.rst90 started with possible_cpus=144. There are 4 CPUs in the system and cpu2
/Documentation/devicetree/bindings/thermal/
Dthermal-zones.yaml309 <&CPU2 3 3>, <&CPU3 3 3>;
316 <&CPU2 5 5>, <&CPU3 5 5>;
/Documentation/userspace-api/
Dperf_ring_buffer.rst172 CPU2 |xxxx| |xxxxxxx|
232 CPU2 | | |xxxx| |xxx| |
272 and CPU2, and be terminated until test_program exits. Even there have tasks
298 CPU2 |xxxx| |xxxxxxx|
359 CPU2 |xxxx| |xxxxxxx|
686 CPU2 |xxxx| |xxxxxxx|
/Documentation/devicetree/bindings/net/
Dmarvell,pp2.yaml93 "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported
/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic-v3.yaml301 affinity = <&cpu0>, <&cpu2>;
/Documentation/trace/coresight/
Dcoresight-config.rst217 cpu0 cpu2 events nr_addr_filters power subsystem uevent
/Documentation/virt/kvm/
Dvcpu-requests.rst215 CPU1 CPU2
/Documentation/translations/zh_CN/core-api/
Dcpu_hotplug.rst99 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu2
/Documentation/devicetree/bindings/sound/
Dsimple-card.yaml485 # CPU2 --/ /* DPCM 3ch/4ch */
/Documentation/core-api/
Dcpu_hotplug.rst98 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu2
/Documentation/translations/ko_KR/
Dmemory-barriers.txt1447 void cpu2(void)
1460 cpu0(), cpu1(), 그리고 cpu2() 는 smp_store_release()/smp_load_acquire() 쌍의
1480 cpu0(), cpu1(), 그리고 cpu2() 는 그들의 읽기와 쓰기를 순서대로 보게 되지만,

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