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/Documentation/ABI/testing/
Dsysfs-bus-iio-sx93246 SX9324 has 3 inputs, CS0, CS1 and CS2. Hardware layout
18 By default, during the first phase, [PH0], CS0 is measured,
21 [PH1], CS1 is measured, CS0 and CS2 are shield:
23 [PH2], CS2 is measured, CS0 and CS1 are shield:
Dsysfs-class-watchdog110 chip at CS0 after booting from the alternate
114 from (CS0->CS1, CS1->CS0) to (CS0->CS0,
119 the SoC is in normal mapping state (i.e. booted from CS0),
/Documentation/devicetree/bindings/iio/proximity/
Dsemtech,sx9310.yaml46 semtech,cs0-ground:
47 description: Indicates the CS0 sensor is connected to ground.
56 0 1 - CS0 + CS1
58 0 1 2 3 - CS0 + CS1 + CS2 + CS3
124 semtech,cs0-ground;
/Documentation/devicetree/bindings/pinctrl/
Dmarvell,armada-370-pinctrl.txt29 mpp12 12 gpio, ge0(rxd1), i2c1(sda), sd0(d0), spi1(cs0),
45 mpp24 24 gpio, ge0(col), ge1(txctl), spi1(cs0)
53 mpp32 32 gpio, spi0(cs0)
54 mpp33 33 gpio, dev(bootcs), spi0(cs0)
71 mpp49 49 gpio, dev(ad10), pcie(clkreq1), sd0(d0), spi1(cs0),
86 mpp58 58 gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk),
Dmarvell,armada-98dx3236-pinctrl.txt17 mpp3 3 gpio, spi0(cs0), dev(ad11)
18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
Dmarvell,armada-39x-pinctrl.txt36 mpp18 18 gpio, ua1(txd), spi0(cs0), i2c2(sck)
44 mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
81 mpp59 59 gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)
Dmarvell,armada-38x-pinctrl.txt36 mpp18 18 gpio, ge0(rxerr), ptp(trig), ua1(txd), spi0(cs0)
43 mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
77 mpp59 59 gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)
Dmarvell,armada-375-pinctrl.txt24 mpp8 8 gpio, dev (bootcs), spi0(cs0), spi1(cs0)
46 mpp30 30 gpio, ge1(txd0), spi1(cs0)
Dmarvell,armada-xp-pinctrl.txt37 mpp16 16 gpio, ge0(txd7), ge1(txd3), spi1(cs0), lcd(d16)
60 mpp39 39 gpio, spi0(cs0)
Dlantiq,pinctrl-falcon.txt40 por, ntr, ntr8k, hrst, mdio, bootled, asc0, spi, spi cs0, spi cs1, i2c,
Dmarvell,kirkwood-pinctrl.txt138 mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo)
187 mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo)
202 mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk)
251 mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo),
272 mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk), lcd(d19)
/Documentation/devicetree/bindings/iio/dac/
Dti,dac7512.yaml38 reg = <0>; /* CS0 */
Dti,dac7311.yaml45 reg = <0>; /* CS0 */
Dlltc,ltc2632.yaml72 reg = <0>; /* CS0 */
/Documentation/translations/zh_CN/scheduler/
Dsched-capacity.rst266 cpusets cs0 cs1
272 mkdir /sys/fs/cgroup/cpuset/cs0
273 echo 0-1 > /sys/fs/cgroup/cpuset/cs0/cpuset.cpus
274 echo 0 > /sys/fs/cgroup/cpuset/cs0/cpuset.mems
/Documentation/devicetree/bindings/mtd/
Darm,pl353-nand-r2p1.yaml41 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
Dti,am654-hbmc.yaml56 ranges = <0x0 0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */
Dti,gpmc-onenand.yaml70 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
Dti,gpmc-nand.yaml97 ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
/Documentation/devicetree/bindings/spi/
Dspi-fsl-lpspi.yaml58 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
/Documentation/devicetree/bindings/mfd/
Dmotorola-cpcap.txt43 reg = <0>; /* cs0 */
/Documentation/gpu/amdgpu/
Ddebugging.rst26 …ult (src_id:0 ring:24 vmid:3 pasid:32777, for process glxinfo pid 2424 thread glxinfo:cs0 pid 2425)
/Documentation/devicetree/bindings/memory-controllers/ti/
Demif.txt41 part attached to CS1, it should be the same type as the one on CS0,
/Documentation/devicetree/bindings/bus/
Dqcom,ebi2.yaml18 (CS0 thru CS5) so that in theory 6 different devices can be connected.
31 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
/Documentation/scheduler/
Dsched-capacity.rst302 cpusets cs0 cs1
308 mkdir /sys/fs/cgroup/cpuset/cs0
309 echo 0-1 > /sys/fs/cgroup/cpuset/cs0/cpuset.cpus
310 echo 0 > /sys/fs/cgroup/cpuset/cs0/cpuset.mems

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