| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-sx9324 | 6 SX9324 has 3 inputs, CS0, CS1 and CS2. Hardware layout
19 while CS1 and CS2 are used as shields.
21 [PH1], CS1 is measured, CS0 and CS2 are shield:
23 [PH2], CS2 is measured, CS0 and CS1 are shield:
25 [PH3], CS1 and CS2 are measured (combo mode):
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| D | sysfs-class-watchdog | 111 chip at CS1.
114 from (CS0->CS1, CS1->CS0) to (CS0->CS0,
115 CS1->CS1).
121 For alternate boot mode (booted from CS1 due to wdt2
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | lantiq,pinctrl-xway.txt | 55 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
56 ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1,
67 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
79 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
93 exin0, exin1, exin2, exin4, nand ale, nand cs0, nand cs1, nand cle,
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| D | mediatek,mt76x8-pinctrl.yaml | 42 spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,
83 spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,
275 enum: [gpio, refclk, spi cs1]
334 const: spi cs1
338 enum: [spi cs1]
429 enum: [i2c, spi cs1, uart0]
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| D | marvell,armada-370-pinctrl.txt | 27 mpp11 11 gpio, ge0(rxd0), uart1(rxd), sd0(cmd), spi0(cs1),
28 sata1(prsnt), spi1(cs1)
70 spi0(cs1)
80 mpp55 55 gpio, dev(cs1), uart1(txd), tdm(rst), sata1(prsnt),
83 pcie(clkreq0), spi1(cs1)
95 mpp64 64 gpio, spi0(miso), spi0(cs1)
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| D | marvell,armada-98dx3236-pinctrl.txt | 18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
46 mpp32 32 gpio, slv_smi(mdio), smi(mdio), dev(cs1)
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| D | marvell,armada-38x-pinctrl.txt | 30 mpp12 12 gpio, ge0(rxd0), pcie0(rstout), spi0(cs1), dev(ad14), pcie3(clkreq)
39 mpp21 21 gpio, spi0(cs1), ge1(rxd0), sata0(prsnt), sd0(cmd), dev(bootcs), sata1(prsnt)
44 mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
73 mpp55 55 gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0), ua1(rxd)
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| D | marvell,armada-375-pinctrl.txt | 16 mpp0 0 gpio, dev(ad2), spi0(cs1), spi1(cs1)
51 mpp35 35 gpio, ge1(rxctl), spi1(cs1), spi0(cs2)
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| D | marvell,armada-39x-pinctrl.txt | 39 mpp21 21 gpio, spi0(cs1), sata0(prsnt) [1], sd0(cmd), dev(bootcs),
45 mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
77 mpp55 55 gpio, ua1(cts), spi1(cs1), sd0(d0), ua1(rxd), ua3(rxd)
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| D | marvell,dove-pinctrl.txt | 23 uart1(cts), lcd-spi(cs1), pmu*
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
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| D | marvell,armada-xp-pinctrl.txt | 61 mpp40 40 gpio, spi0(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0),
62 spi1(cs1)
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| D | lantiq,pinctrl-falcon.txt | 40 por, ntr, ntr8k, hrst, mdio, bootled, asc0, spi, spi cs0, spi cs1, i2c,
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| D | marvell,kirkwood-pinctrl.txt | 148 mpp34 34 gpio, ge1(txen), tdm(spi-cs1)
197 mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act)
199 mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi)
266 mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act), lcd(d14)
269 mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi), twsi1(sda)
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| /Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 39 - cs1-used : Have this property if CS1 of this EMIF
41 part attached to CS1, it should be the same type as the one on CS0,
66 cs1-used;
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-fsl-lpspi.yaml | 55 fsl,spi-only-use-cs1-sel:
58 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
95 fsl,spi-only-use-cs1-sel;
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| D | spi-orion.txt | 51 <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
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| D | spi-controller.yaml | 41 cs1 : native
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| /Documentation/devicetree/bindings/iio/proximity/ |
| D | semtech,sx9310.yaml | 56 0 1 - CS0 + CS1
57 1 2 - CS1 + CS2 (default)
58 0 1 2 3 - CS0 + CS1 + CS2 + CS3
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| /Documentation/translations/zh_CN/scheduler/ |
| D | sched-capacity.rst | 266 cpusets cs0 cs1
276 mkdir /sys/fs/cgroup/cpuset/cs1
277 echo 2-7 > /sys/fs/cgroup/cpuset/cs1/cpuset.cpus
278 echo 0 > /sys/fs/cgroup/cpuset/cs1/cpuset.mems
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| /Documentation/devicetree/bindings/mtd/ |
| D | arm,pl353-nand-r2p1.yaml | 42 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
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| D | ti,am654-hbmc.yaml | 57 <0x1 0x0 0x5 0x04000000 0x4000000>; /* CS1 - 64MB */
|
| /Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.yaml | 25 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
32 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
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| D | socionext,uniphier-system-bus.yaml | 77 // - the Ethernet device is connected at the offset 0x01f00000 of CS1 and
|
| /Documentation/scheduler/ |
| D | sched-capacity.rst | 302 cpusets cs0 cs1
312 mkdir /sys/fs/cgroup/cpuset/cs1
313 echo 2-7 > /sys/fs/cgroup/cpuset/cs1/cpuset.cpus
314 echo 0 > /sys/fs/cgroup/cpuset/cs1/cpuset.mems
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl35x-smc.yaml | 146 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
|