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/Documentation/devicetree/bindings/bus/
Dts-nbus.txt12 - ts,csn-gpios : The GPIO pin connected to the csn line on the FPGA
39 ts,csn-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
/Documentation/devicetree/bindings/memory-controllers/
Dexynos-srom.yaml78 Tcah: Address holding time after CSn (0 - 15)
82 Tacs: Address set-up before CSn (0 - 15)
/Documentation/devicetree/bindings/iio/resolver/
Dadi,ad2s1210.yaml46 SPI CSn output of the SPI controller.
/Documentation/devicetree/bindings/arm/marvell/
Dcp110-system-controller.txt105 …sn), dev(csn0), spi1(csn0), spi0(csn3), au(i2sextclk), spi0(miso), sata0(present_act), mss_spi(csn)
124 mpp33 33 gpio, mii(txclk), sdio(pwr10), mss_spi(csn), tdm(fsync), au(i2smclk), sdio(bus_pwr), xg(md…
/Documentation/ABI/stable/
Dsysfs-devices-node82 Contact: Mel Gorman <mel@csn.ul.ie>
/Documentation/networking/device_drivers/cable/
Dsb1000.rst112 cm0: sb1000 at (0x110,0x310), csn 1, S/N 0x2a0d16d8, IRQ 11.
/Documentation/networking/
Doa-tc6-framework.rst53 SPI transactions are initiated by the SPI host with the assertion of CSn
54 low to the MAC-PHY and ends with the deassertion of CSn high. In between
/Documentation/trace/postprocess/
Dtrace-pagealloc-postprocess.pl14 # Author: Mel Gorman <mel@csn.ul.ie>
Dtrace-vmscan-postprocess.pl12 # Author: Mel Gorman <mel@csn.ul.ie>
/Documentation/sound/cards/
Dmultisound.sh111 # (CSN 2)