Searched full:cadence (Results 1 – 25 of 49) sorted by relevance
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-cadence-torrent.yaml | 4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
7 title: Cadence Torrent SD0801 PHY
10 This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
11 hardware included with the Cadence MHDP DisplayPort controller. Torrent
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
116 Refer include/dt-bindings/phy/phy-cadence.h for the constants to be used.
182 #include <dt-bindings/phy/phy-cadence.h>
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| D | phy-cadence-sierra.yaml | 4 $id: http://devicetree.org/schemas/phy/phy-cadence-sierra.yaml#
7 title: Cadence Sierra PHY
10 This binding describes the Cadence Sierra PHY. Sierra PHY supports multilink
14 - Swapnil Jakhade <sjakhade@cadence.com>
15 - Yuti Amonkar <yamonkar@cadence.com>
112 Refer include/dt-bindings/phy/phy-cadence.h for the constants to be used.
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| D | cdns,dphy-rx.yaml | 7 title: Cadence DPHY Rx
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| D | cdns,dphy.yaml | 7 title: Cadence DPHY
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| D | cdns,salvo-phy.yaml | 8 title: Cadence SALVO PHY
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| /Documentation/devicetree/bindings/i2c/ |
| D | cdns,i2c-r1p10.yaml | 7 title: Cadence I2C controller
18 - cdns,i2c-r1p10 # cadence i2c controller version 1.0
19 - cdns,i2c-r1p14 # cadence i2c controller version 1.4
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| /Documentation/devicetree/bindings/pci/ |
| D | cdns-pcie.yaml | 7 title: Cadence PCIe Core
10 - Tom Joseph <tjoseph@cadence.com>
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| D | cdns-pcie-ep.yaml | 7 title: Cadence PCIe Device
10 - Tom Joseph <tjoseph@cadence.com>
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| D | cdns-pcie-host.yaml | 7 title: Cadence PCIe Host
10 - Tom Joseph <tjoseph@cadence.com>
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| D | cdns,cdns-pcie-ep.yaml | 7 title: Cadence PCIe EP Controller
10 - Tom Joseph <tjoseph@cadence.com>
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| D | cdns,cdns-pcie-host.yaml | 7 title: Cadence PCIe host controller
10 - Tom Joseph <tjoseph@cadence.com>
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| /Documentation/devicetree/bindings/rtc/ |
| D | cdns,rtc.txt | 1 Cadence Real Time Clock
3 The Cadence RTC controller with date, time and alarm capabilities.
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| /Documentation/devicetree/bindings/spi/ |
| D | cdns,xspi.yaml | 2 # Copyright 2020-21 Cadence
8 title: Cadence XSPI Controller
11 - Parshuram Thombare <pthombar@cadence.com>
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| D | spi-cadence.yaml | 4 $id: http://devicetree.org/schemas/spi/spi-cadence.yaml#
7 title: Cadence SPI controller
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| D | spi-xtensa-xtfpga.txt | 1 Cadence Xtensa XTFPGA platform SPI controller.
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| D | cdns,qspi-nor-peripheral-props.yaml | 7 title: Peripheral-specific properties for the Cadence QSPI controller.
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| /Documentation/devicetree/bindings/watchdog/ |
| D | cdns,wdt-r1p2.yaml | 7 title: Cadence watchdog timer controller
13 The cadence watchdog timer is used to detect and recover from
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| /Documentation/devicetree/bindings/ufs/ |
| D | cdns,ufshc.yaml | 7 title: Cadence Universal Flash Storage (UFS) Controller
10 - Jan Kotas <jank@cadence.com>
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | cdns,mhdp8546.yaml | 7 title: Cadence MHDP8546 bridge
10 - Swapnil Jakhade <sjakhade@cadence.com>
11 - Yuti Amonkar <yamonkar@cadence.com>
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| /Documentation/devicetree/bindings/mtd/ |
| D | cadence-nand-controller.txt | 1 * Cadence NAND controller
28 the cadence nand flash controller
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| /Documentation/devicetree/bindings/media/ |
| D | cdns,csi2tx.txt | 1 Cadence MIPI-CSI2 TX controller
4 The Cadence MIPI-CSI2 TX controller is a CSI-2 bridge supporting up to
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| D | cdns,csi2rx.yaml | 7 title: Cadence MIPI-CSI2 RX controller
13 The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI
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| /Documentation/devicetree/bindings/usb/ |
| D | cdns,usb3.yaml | 7 title: Cadence USBSS-DRD controller
10 - Pawel Laszczak <pawell@cadence.com>
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| /Documentation/devicetree/bindings/clock/ |
| D | fixed-mmio-clock.yaml | 17 - Jan Kotas <jank@cadence.com>
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| /Documentation/devicetree/bindings/i3c/ |
| D | cdns,i3c-master.yaml | 7 title: Cadence I3C master block
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