Searched full:cells (Results 1 – 25 of 3160) sorted by relevance
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-mxs.yaml | 25 '#address-cells':
27 '#size-cells':
51 "#interrupt-cells":
54 "#gpio-cells":
64 - "#interrupt-cells"
65 - "#gpio-cells"
73 - '#address-cells'
74 - '#size-cells'
81 #address-cells = <1>;
82 #size-cells = <0>;
[all …]
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| D | mrvl-gpio.yaml | 74 '#address-cells':
77 '#size-cells':
82 '#gpio-cells':
93 '#interrupt-cells':
110 - '#address-cells'
111 - '#size-cells'
114 - '#gpio-cells'
118 - '#interrupt-cells'
127 #address-cells = <1>;
128 #size-cells = <1>;
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| /Documentation/devicetree/bindings/pci/ |
| D | ralink,rt3883-pci.txt | 12 - #address-cells: specifies the number of cells needed to encode an
15 - #size-cells: specifies the number of cells used to represent the size
37 - #address-cells: specifies the number of cells needed to encode an
41 - #interrupt-cells: specifies the number of cells needed to encode an
52 - #address-cells: specifies the number of cells needed to encode an
55 - #size-cells: specifies the number of cells used to represent the size
58 - #interrupt-cells: specifies the number of cells needed to encode an
83 - #address-cells: must be set to <3>
85 - #size-cells: must set to <2>
87 - #interrupt-cells: must be set to <1>
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| D | mediatek-pcie.txt | 14 - #address-cells: Address representation for root ports (must be 3)
15 - #size-cells: Size representation for root ports (must be 2)
42 - #interrupt-cells: Size representation for interrupts (must be 1)
65 - #address-cells: Must be 3
66 - #size-cells: Must be 2
67 - #interrupt-cells: Must be 1
81 #clock-cells = <1>;
82 #reset-cells = <1>;
93 #address-cells = <3>;
94 #size-cells = <2>;
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| /Documentation/devicetree/bindings/mtd/partitions/ |
| D | nvmem-cells.yaml | 4 $id: http://devicetree.org/schemas/mtd/partitions/nvmem-cells.yaml#
7 title: Nvmem cells
10 Any partition containing the compatible "nvmem-cells" will register as a
13 Nvmem binding to declare nvmem-cells can be found in:
22 - $ref: /schemas/nvmem/nvmem-deprecated-cells.yaml#
26 const: nvmem-cells
37 #address-cells = <1>;
38 #size-cells = <1>;
44 compatible = "nvmem-cells";
48 #address-cells = <1>;
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| /Documentation/devicetree/bindings/arm/apple/ |
| D | apple,pmgr.yaml | 35 "#address-cells":
38 "#size-cells":
57 #address-cells = <2>;
58 #size-cells = <2>;
62 #address-cells = <1>;
63 #size-cells = <1>;
69 #power-domain-cells = <0>;
70 #reset-cells = <0>;
78 #power-domain-cells = <0>;
79 #reset-cells = <0>;
[all …]
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| /Documentation/devicetree/bindings/thermal/ |
| D | sprd-thermal.yaml | 30 nvmem-cells:
40 "#thermal-sensor-cells":
43 "#address-cells":
46 "#size-cells":
60 nvmem-cells:
70 - nvmem-cells
80 - nvmem-cells
82 - "#address-cells"
83 - "#size-cells"
94 #thermal-sensor-cells = <1>;
[all …]
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| /Documentation/devicetree/bindings/mux/ |
| D | reg-mux.yaml | 24 '#mux-control-cells':
40 - '#mux-control-cells'
52 #mux-control-cells = <1>;
62 #address-cells = <1>;
63 #size-cells = <0>;
67 #address-cells = <1>;
68 #size-cells = <0>;
73 #address-cells = <1>;
74 #size-cells = <0>;
82 #address-cells = <1>;
[all …]
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| /Documentation/devicetree/bindings/net/pse-pd/ |
| D | microchip,pd692x0.yaml | 40 "#address-cells":
43 "#size-cells":
47 - "#address-cells"
48 - "#size-cells"
65 "#address-cells":
68 "#size-cells":
85 - "#address-cells"
86 - "#size-cells"
98 #address-cells = <1>;
99 #size-cells = <0>;
[all …]
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| D | ti,tps23881.yaml | 23 '#pse-cells':
38 "#address-cells":
41 "#size-cells":
57 - "#address-cells"
58 - "#size-cells"
69 #address-cells = <1>;
70 #size-cells = <0>;
77 #address-cells = <1>;
78 #size-cells = <0>;
94 #address-cells = <1>;
[all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | mediatek,mt8195-clock.yaml | 55 '#clock-cells':
69 #clock-cells = <1>;
76 #clock-cells = <1>;
83 #clock-cells = <1>;
90 #clock-cells = <1>;
97 #clock-cells = <1>;
104 #clock-cells = <1>;
111 #clock-cells = <1>;
118 #clock-cells = <1>;
125 #clock-cells = <1>;
[all …]
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| D | mediatek,mt8192-clock.yaml | 43 '#clock-cells':
57 #clock-cells = <1>;
64 #clock-cells = <1>;
71 #clock-cells = <1>;
78 #clock-cells = <1>;
85 #clock-cells = <1>;
92 #clock-cells = <1>;
99 #clock-cells = <1>;
106 #clock-cells = <1>;
113 #clock-cells = <1>;
[all …]
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| D | stericsson,u8500-clks.yaml | 44 '#clock-cells':
50 description: A subnode with two clock cells for PRCC (peripheral
58 '#clock-cells':
64 description: A subnode with two clock cells for PRCC (peripheral reset
72 '#clock-cells':
78 description: A subnode with two reset cells for the reset portions of the
86 '#reset-cells':
92 description: A subnode with zero clock cells for the 32kHz RTC clock.
96 '#clock-cells':
103 clock cells.
[all …]
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| /Documentation/devicetree/bindings/mfd/ |
| D | kontron,sl28cpld.yaml | 26 "#address-cells":
29 "#size-cells":
32 "#interrupt-cells":
57 - "#address-cells"
58 - "#size-cells"
68 #address-cells = <1>;
69 #size-cells = <0>;
74 #address-cells = <1>;
75 #size-cells = <0>;
91 #pwm-cells = <2>;
[all …]
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| D | delta,tn48m-cpld.yaml | 31 "#address-cells":
34 "#size-cells":
40 - "#address-cells"
41 - "#size-cells"
55 #address-cells = <1>;
56 #size-cells = <0>;
61 #address-cells = <1>;
62 #size-cells = <0>;
68 #gpio-cells = <2>;
75 #gpio-cells = <2>;
[all …]
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| D | mscc,ocelot.yaml | 30 "#address-cells":
33 "#size-cells":
72 - '#address-cells'
73 - '#size-cells'
81 #clock-cells = <0>;
86 #address-cells = <1>;
87 #size-cells = <0>;
93 #address-cells = <1>;
94 #size-cells = <1>;
98 #address-cells = <1>;
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| /Documentation/devicetree/bindings/leds/ |
| D | kinetic,ktd202x.yaml | 35 "#address-cells":
38 "#size-cells":
47 "#address-cells":
50 "#size-cells":
70 - "#address-cells"
71 - "#size-cells"
91 - "#address-cells"
92 - "#size-cells"
101 #address-cells = <1>;
102 #size-cells = <0>;
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| /Documentation/devicetree/bindings/bus/ |
| D | microsoft,vmbus.yaml | 22 '#address-cells':
25 '#size-cells':
31 - '#address-cells'
32 - '#size-cells'
39 #address-cells = <2>;
40 #size-cells = <1>;
43 #address-cells = <2>;
44 #size-cells = <1>;
49 #address-cells = <2>;
50 #size-cells = <1>;
|
| /Documentation/devicetree/bindings/power/supply/ |
| D | sbs,sbs-manager.yaml | 29 "#address-cells":
32 "#size-cells":
37 "#gpio-cells":
63 #address-cells = <1>;
64 #size-cells = <0>;
69 #address-cells = <1>;
70 #size-cells = <0>;
73 #gpio-cells = <2>;
76 #address-cells = <1>;
77 #size-cells = <0>;
[all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | rockchip-usb-phy.yaml | 19 "#address-cells":
22 "#size-cells":
27 - "#address-cells"
28 - "#size-cells"
40 "#phy-cells":
49 "#clock-cells":
63 - "#phy-cells"
71 #address-cells = <1>;
72 #size-cells = <0>;
76 #phy-cells = <0>;
|
| D | socionext,uniphier-usb2-phy.yaml | 25 "#address-cells":
28 "#size-cells":
43 "#phy-cells":
51 - "#phy-cells"
55 - "#address-cells"
56 - "#size-cells"
66 #address-cells = <1>;
67 #size-cells = <0>;
71 #phy-cells = <0>;
76 #phy-cells = <0>;
[all …]
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| /Documentation/devicetree/bindings/net/ |
| D | mdio-mux-multiplexer.yaml | 38 #mux-control-cells = <1>;
47 #address-cells = <1>;
48 #size-cells = <0>;
52 #address-cells = <1>;
53 #size-cells = <0>;
58 #address-cells = <1>;
59 #size-cells = <0>;
67 #address-cells = <1>;
68 #size-cells = <0>;
72 #address-cells = <1>;
[all …]
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | sprd,sc2720-adc.yaml | 31 "#io-channel-cells":
37 nvmem-cells: true
51 nvmem-cells:
60 nvmem-cells:
75 - "#io-channel-cells"
77 - nvmem-cells
86 #address-cells = <1>;
87 #size-cells = <0>;
93 #io-channel-cells = <1>;
95 nvmem-cells = <&adc_big_scale>, <&adc_small_scale>;
[all …]
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| /Documentation/devicetree/bindings/arm/bcm/ |
| D | raspberrypi,bcm2835-firmware.yaml | 39 "#clock-cells":
47 - "#clock-cells"
59 "#gpio-cells":
71 - "#gpio-cells"
81 "#reset-cells":
88 - "#reset-cells"
98 "#pwm-cells":
99 # See pwm.yaml in this directory for a description of the cells format.
104 - "#pwm-cells"
120 #clock-cells = <1>;
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| /Documentation/devicetree/bindings/power/ |
| D | renesas,sysc-rmobile.yaml | 41 '#address-cells':
44 '#size-cells':
73 '#address-cells':
76 '#size-cells':
79 '#power-domain-cells':
83 - '#power-domain-cells'
99 #address-cells = <1>;
100 #size-cells = <0>;
101 #power-domain-cells = <0>;
105 #address-cells = <1>;
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