Home
last modified time | relevance | path

Searched full:child (Results 1 – 25 of 518) sorted by relevance

12345678910>>...21

/Documentation/devicetree/bindings/i2c/
Di2c-mux.yaml13 An i2c bus multiplexer/switch will have several child busses that are numbered
15 multiplexer/switch will have one child node for each child bus.
17 For i2c multiplexers/switches that have child nodes that are a mixture of both
18 i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for
19 populating the i2c child busses. If an 'i2c-mux' subnode is present, only
20 subnodes of this will be considered as i2c child busses.
39 description: The mux selector sub-bus number for the child I2C bus.
Di2c-mux-pinctrl.yaml22 | +---+ +------+ | child bus A, on first set of pins
24 | +---+ +------+ | child bus B, on second set of pins
31 For each named state defined in the pinctrl-names property, an I2C child bus will be created.
32 I2C child bus numbers are assigned based on the index into the pinctrl-names property.
41 Whenever an access is made to a device on a child bus, the relevant pinctrl state will be
44 If an idle state is defined, whenever an access is not being made to a device on a child bus,
48 into hardware whenever no access is being made of a device on a child bus.
Di2c-mux-gpio.yaml20 | +------+ | +------+ child bus A, on GPIO value set to 0
22 | +------+ | +--+---+ child bus B, on GPIO value set to 1
29 For each I2C child node, an I2C child bus will be created. They will be numbered based on their
32 Whenever an access is made to a device on a child bus, the value set in the relevant node's reg
37 being made to a device on a child bus, the GPIOs will be set according to the idle value.
40 hardware whenever no access is being made to a device on a child bus.
/Documentation/networking/
Dfib_trie.rst15 An internal node, holding an array of child (leaf or tnode) pointers,
22 child array - the "child index". See Level Compression.
26 the child array. See Path Compression.
29 Any given tnode is linked to from the child array of its parent, using
39 Level Compression / child arrays
41 children of a full child (see "full_children") up one level, so that
44 Conversely, a tnode with a mostly empty child array (see empty_children)
46 in order to avoid ever-increasing child arrays.
49 the number of positions in the child array of a given tnode that are
85 Analyzes a tnode and optimizes the child array size by either inflating
[all …]
/Documentation/devicetree/bindings/pwm/
Dpwm-tipwmss.txt10 - address-cells: Specify the number of u32 entries needed in child nodes.
12 - size-cells: specify number of u32 entries needed to specify child nodes size
15 physical address map of child's base address, physical address within
17 3 set of child register maps present, ECAP register space, EQEP
20 Also child nodes should also populated under PWMSS DT node.
33 /* child nodes go here */
46 /* child nodes go here */
57 /* child nodes go here */
/Documentation/devicetree/bindings/interrupt-controller/
Driscv,aplic.yaml20 domain can delegate interrupt sources to it's child APLIC domains. There
72 A list of child APLIC domains for the given APLIC domain. Each child
73 APLIC domain is assigned a child index in increasing order, with the
74 first child APLIC domain assigned child index 0. The APLIC domain child
76 domain to a particular child APLIC domain.
84 - description: child APLIC domain phandle
89 of child APLIC domain phandle, first interrupt number of the parent
/Documentation/devicetree/bindings/mfd/
Dcanaan,k210-sysctl.yaml37 # Child node
41 Clock controller for the SoC clocks. This child node definition
46 # Child node
50 Reset controller for the SoC. This child node definition
55 # Child node
59 Reboot method for the SoC. This child node definition
Dtps65912.txt16 - regulators: : List of child nodes that specify the regulator
17 initialization data. Child nodes must be named
19 ldo[1-10]. Each child nodes is defined using the
Dbrcm,bcm6358-gpio-sysctl.yaml36 # Child node
40 GPIO controller for the SoC GPIOs. This child node definition
45 # Child node
49 Pin controller for the SoC pins. This child node definition
/Documentation/i2c/
Di2c-address-translators.rst14 ("upstream") port and N I2C master child ("downstream") ports, and
18 slave address of the child bus. Address translation is done by the
22 - the address on the parent and child busses can be different
23 - there is normally no need to select the child port; the alias used on the
29 The ATR creates a new I2C "child" adapter on each child bus. Adding
30 devices on the child bus ends up in invoking the driver code to select
34 all I2C transactions directed to devices on the child buses.
/Documentation/devicetree/bindings/mtd/
Dsamsung-s3c2410.txt13 Optional child nodes:
14 Child nodes representing the available nand chips.
16 Optional child properties:
20 Each child device node may optionally contain a 'partitions' sub-node,
/Documentation/devicetree/bindings/spmi/
Dspmi.yaml20 Each SPMI controller has zero or more child nodes (up to 16 ones), each
35 description: up to 16 child PMIC nodes
68 child@0 {
72 child@7 {
/Documentation/admin-guide/cgroup-v1/
Dpids.rst34 pids.current tracks all child cgroup hierarchies, so parent/pids.current is a
35 superset of parent/child/pids.current.
52 # mkdir -p /sys/fs/cgroup/pids/parent/child
68 Even if we migrate to a child cgroup (which doesn't have a set limit), we will
72 # echo $$ > /sys/fs/cgroup/pids/parent/child/cgroup.procs
75 # cat /sys/fs/cgroup/pids/parent/child/pids.current
77 # cat /sys/fs/cgroup/pids/parent/child/pids.max
/Documentation/devicetree/bindings/memory-controllers/
Darm,pl172.txt23 - clock-ranges: Empty property indicating that child nodes can inherit
28 Child chip-select (cs) nodes contain the memory devices nodes connected to
31 Required child cs node properties:
37 - ranges: Empty property indicating that child nodes can inherit
40 - clock-ranges: Empty property indicating that child nodes can inherit
50 Optional child cs node config properties:
65 Optional child cs node timing properties:
/Documentation/devicetree/bindings/powerpc/opal/
Dsensor-groups.txt7 servers. Each child node indicates a sensor group.
11 Each child node contains below properties:
22 - sensors : Phandle array of child nodes of /ibm,opal/sensor/
/Documentation/devicetree/bindings/mmc/
Damlogic,meson-mx-sdio.txt24 Required child nodes:
26 NOTE: due to a driver limitation currently only one slot (= child node)
29 Required properties on each child node (= slot):
33 Optional properties on each child node (= slot):
/Documentation/devicetree/bindings/leds/
Dleds-mt6323.txt22 Each led is represented as a child node of the mediatek,mt6323-led that
24 LED child nodes can be supported.
26 Required properties for the LED child node:
29 Optional properties for the LED child node:
Dleds-lm3601x.txt14 Required child properties:
18 Required properties for flash LED child nodes:
24 Optional child properties:
/Documentation/devicetree/bindings/memory-controllers/fsl/
Dfsl,imx-weim-peripherals.yaml14 This binding is meant for the child nodes of the WEIM node. The node
26 Timing values for the child node.
30 # the WEIM child will have its own native properties
/Documentation/devicetree/bindings/net/
Dmdio-mux.yaml13 An MDIO bus multiplexer/switch will have several child busses that are
15 bus multiplexer/switch will have one child node for each child bus.
/Documentation/devicetree/bindings/dma/xilinx/
Dxilinx_dma.txt28 - dma-channel child node: Should have at least one channel and can have up to
30 DMA channel (see child node properties below).
65 Required child node properties:
76 Optional child node properties:
79 Optional child node properties for VDMA:
84 Optional child node properties for MCDMA:
85 - dma-channels: Number of dma channels in child node.
/Documentation/devicetree/bindings/media/i2c/
Dadp1653.txt12 represented by one child node, nodes need to be named "flash" and "indicator".
14 Required properties of the LED child node:
17 Required properties of the flash LED child node:
/Documentation/devicetree/bindings/pinctrl/
Dpinctrl.yaml17 The contents of each of those pin configuration child nodes is defined
24 whether there is any interaction between the child and intermediate parent
43 child nodes for individual pin group control.
/Documentation/devicetree/bindings/usb/
Docteon-usb.txt18 - ranges: specifies the translation between child address space and parent
31 2) Child node
33 The main node must have one child node which describes the built-in
/Documentation/devicetree/
Dof_unittest.rst92 struct device_node *child;
98 considering only child and sibling pointers. There exists another pointer,
100 a particular level the child node and all the sibling nodes will have a parent
161 In the function of_attach_node(), the new node is attached as the child of the
162 given parent in live tree. But, if parent already has a child then the new node
163 replaces the current child and turns it into its sibling. So, when the testcase
205 test-child0 the test-sibling1 is attached that pushes the child node
206 (i.e. test-child0) to become a sibling and makes itself a child node,
224 To detach a node, of_detach_node() either updates the child pointer of given

12345678910>>...21