Searched full:d0 (Results 1 – 25 of 76) sorted by relevance
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| /Documentation/driver-api/media/drivers/ |
| D | pxa_camera.rst | 121 For the next schema, let's assume d0=desc-sg[0] .. dN=desc-sg[N],
129 | d0 | .. | dN | l | | d0 | .. | dN | f |
140 | d0 | .. | dN | l | | d0 | .. | dN | l | | d0 | .. | dN | f |
161 | d0 | .. | dN | l | | d0 | .. | dN | f |
176 | d0 | .. | dN | l | | d0 | .. | dN | l | | d0 | .. | dN | f |
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| /Documentation/firmware-guide/acpi/ |
| D | non-d0-probe.rst | 20 bus driver normally sets the device in D0 state for probe.
33 the device will not be powered on (put in D0 state) for probe.
44 0 D0 Device fully powered on
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| D | index.rst | 28 non-d0-probe
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| /Documentation/devicetree/bindings/spi/ |
| D | omap-spi.yaml | 54 ti,pindir-d0-out-d1-in:
56 Select the D0 pin as output and D1 as input. The default is D0
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-mipi-dbi-spi.yaml | 43 |<0><D7><D6><D5><D4><D3><D2><D1><D0>|<D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|
47 |<X><X><X><X><X><X><X><D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|
51 |<D7><D6><D5><D4><D3><D2><D1><D0>|
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| /Documentation/devicetree/bindings/display/ti/ |
| D | ti,dra7-dss.txt | 73 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
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| D | ti,omap5-dss.txt | 99 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
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| D | ti,omap4-dss.txt | 118 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
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| /Documentation/driver-api/dmaengine/ |
| D | pxa_dma.rst | 77 | d0 | .. | dN | l | | d0 | .. | dN | f |
88 | d0 | .. | dN | l | | d0 | .. | dN | l | | d0 | .. | dN | f |
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| /Documentation/ABI/testing/ |
| D | sysfs-devices-power_resources_D0 | 11 the given device node to be in ACPI power state D0. The names
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| D | sysfs-devices-power_state | 11 "D0", "D1", "D2", "D3hot", and "D3cold", reflect the power state
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| D | sysfs-devices-real_power_state | 13 resources. Its possible values, "D0", "D1", "D2", "D3hot", and
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| /Documentation/devicetree/bindings/net/ |
| D | qca,qca7000.txt | 54 local-mac-address = [ A0 B0 C0 D0 E0 F0 ];
84 local-mac-address = [ A0 B0 C0 D0 E0 F0 ];
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| /Documentation/devicetree/bindings/nvmem/ |
| D | ingenic,jz4780-efuse.yaml | 38 efuse@134100d0 {
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| /Documentation/devicetree/bindings/watchdog/ |
| D | amlogic,meson-gxbb-wdt.yaml | 46 watchdog@98d0 {
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| /Documentation/devicetree/bindings/devfreq/event/ |
| D | samsung,exynos-ppmu.yaml | 126 ppmu_event0_d0_general: ppmu-event0-d0-general {
127 event-name = "ppmu-event0-d0-general";
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| /Documentation/devicetree/bindings/clock/st/ |
| D | st,quadfs.txt | 15 "st,quadfs-d0"
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| /Documentation/power/ |
| D | pci.rst | 85 The PCI PM Spec defines 4 operating states for devices (D0-D3) and for buses
88 the device or bus to return to the full-power state (D0 or B0, respectively).
101 Note that every PCI device can be in the full-power state (D0) or in D3cold,
104 as well as D0. The support for the D1 and D2 power states is optional.
111 programmatically put into D0. Thus the kernel can switch the device back and
112 forth between D0 and the supported low-power states (except for D3cold) and the
118 | D0 | D1, D2, D3 |
124 | D1, D2, D3 | D0 |
127 The transition from D3cold to D0 occurs when the supply voltage is provided to
128 the device (i.e. power is restored). In that case the device returns to D0 with
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| /Documentation/devicetree/bindings/regulator/ |
| D | sprd,sc2731-regulator.yaml | 37 "^LDO_(CAM(A0|A1|D0|D1|IO|MOT)|CON|EMMCCORE|SD(CORE|IO)|SRAM|USB33|VLDO|WIFIPA)$":
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-latch.yaml | 19 OUT0 ----------------+--|-----------|D0 Q0|-----|<
32 | | | | | | | `--------------|D0 Q0|-----|<
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| /Documentation/devicetree/bindings/media/ |
| D | renesas,drif.yaml | 20 | |-----SD0------->|D0 |
164 # | |-----SD0------->|D0 |
221 # | | |D0 (unused) |
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| /Documentation/devicetree/bindings/usb/ |
| D | brcm,usb-pinmap.yaml | 61 usb_pinmap: usb-pinmap@22000d0 {
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| /Documentation/networking/ |
| D | plip.rst | 142 D0->ERROR 2 - 15 15 - 2
173 D0->D0 2 - 2
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| /Documentation/devicetree/bindings/fpga/ |
| D | xlnx,fpga-selectmap.yaml | 16 the clock, with the MSB of each byte presented to the D0 pin.
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,armada-370-pinctrl.txt | 29 mpp12 12 gpio, ge0(rxd1), i2c1(sda), sd0(d0), spi1(cs0),
71 mpp49 49 gpio, dev(ad10), pcie(clkreq1), sd0(d0), spi1(cs0),
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