Searched full:drp (Results 1 – 6 of 6) sorted by relevance
7 title: TI HD3SS3220 TypeC DRP Port Controller13 HD3SS3220 is a USB SuperSpeed (SS) 2:1 mux with DRP port controller. The device provides Channel16 Dual Role Port (DRP) making it ideal for any application.
7 The XADC has a DRP interface for communication. Currently two different8 frontends for the DRP interface exist. One that is only available on the ZYNQ15 UltraScale+ FPGAs from Xilinx. The System Monitor provides a DRP interface for
140 PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring141 from external master. Out of this interface currently only DRP is
71 support. "dual" refers to Dual Role Port (DRP).268 description: Represents the max time in ms that a DRP in source role should430 # power delivery support, explicitly defines time properties and enables drp.
14 for example "[host] device" when DRP port is in host mode.
190 | |drp=N |Number of LRU'd cookies relinquished/withdrawn |