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/Documentation/devicetree/bindings/remoteproc/
Dqcom,q6v5.txt9 Definition: must be one of:
16 Definition: must specify the base address and size of the qdsp6 and
22 Definition: must be "q6dsp" and "rmb"
27 Definition: reference to the interrupts that match interrupt-names
32 Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
37 Definition: reference to the clocks that match clock-names
42 Definition: The clocks needed depend on the compatible string:
54 Definition: reference to the list of 3 reset-controllers for the
60 Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset"
66 Definition: reference to wcss reserved-memory region.
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/Documentation/devicetree/bindings/powerpc/fsl/
Dsrio-rmu.txt13 Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu".
21 Definition: A standard property. Specifies the physical address and
28 Definition: The logical I/O device number for the PAMU (IOMMU) to be
44 Definition: Must include "fsl,srio-msg-unit-vX.Y", "fsl,srio-msg-unit".
52 Definition: A standard property. Specifies the physical address and
59 Definition: Specifies the interrupts generated by this device. The
73 Definition: Must include:
82 Definition: A standard property. Specifies the physical address and
89 Definition: Specifies the interrupts generated by this device. The
103 Definition: Must include:
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Ddcsr.txt24 Definition: Must include "fsl,dcsr" and "simple-bus".
30 Definition: A standard property. Defines the number of cells
36 Definition: A standard property. Defines the number of cells
43 Definition: A standard property. Specifies the physical address
64 Definition: Must include "fsl,dcsr-epu"
69 Definition: Specifies the interrupts generated by the EPU.
90 Definition: A standard property. Specifies the physical address
114 Definition: Must include "fsl,dcsr-npc"
119 Definition: A standard property. Specifies the physical address
151 Definition: Must include "fsl,dcsr-nxc"
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Dsrio.txt8 Definition: Must include "fsl,srio" for IP blocks with IP Block
18 Definition: A standard property. Specifies the physical address and
25 Definition: Specifies the interrupts generated by this device. The
36 Definition: A single <phandle> value that points to the RMU.
46 Definition: A standard property. Matches the port id.
51 Definition: A standard property. Utilized to describe the memory mapped
59 Definition: The logical I/O device number for the PAMU (IOMMU) to be
Dmcm.txt18 Definition: Must include "fsl,mcm-law"
23 Definition: A standard property. The value specifies the
30 Definition: The value specifies the number of local access
46 Definition: Must include "fsl,CHIP-mcm", "fsl,mcm" where
52 Definition: A standard property. The value specifies the
Decm.txt18 Definition: Must include "fsl,ecm-law"
23 Definition: A standard property. The value specifies the
30 Definition: The value specifies the number of local access
46 Definition: Must include "fsl,CHIP-ecm", "fsl,ecm" where
52 Definition: A standard property. The value specifies the
Dmpic.txt17 Definition: Shall include "fsl,mpic". Freescale MPIC
25 Definition: A standard property. Specifies the physical
32 Definition: Specifies that this node is an interrupt
38 Definition: Shall be 2 or 4. A value of 2 means that interrupt
45 Definition: Shall be 0.
50 Definition: The presence of this property specifies that the
80 INTERRUPT SPECIFIER DEFINITION
192 * Definition of a node defining the 4
207 * Definition of a node defining the MPIC
222 * Definition of an error interrupt (interrupt type 1).
Dcpus.txt6 per the definition in the Devicetree Specification.
16 Definition: The EREF (EREF: A Programmer.s Reference Manual for
27 Definition: The Coherency Subdomain ID Port Mapping Registers and
Dinterlaken-lac.txt42 Definition: Must include "fsl,interlaken-lac". This represents only
61 Definition: Points to the non-protected LAC CCSR mapped register space
67 Definition: A standard property. The first resource represents the
73 Definition: Interrupt mapping for Interlaken LAC error IRQ.
103 Definition: A standard property. Must have a value of 1.
108 Definition: A standard property. Must have a value of 1.
113 Definition: Must include "fsl,interlaken-lac-portals"
118 Definition: A standard property. Specifies the address and length
134 Definition: Must include "fsl,interlaken-lac-portal-vX.Y" where X is
147 Definition: A standard property. The first resource represents the
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/Documentation/devicetree/bindings/csky/
Dcpus.txt13 cpus and cpu node bindings definition
27 Definition: must be set to 1
31 Definition: must be set to 0
42 Definition: must be "cpu"
46 Definition: CPU index
50 Definition: must contain "csky", eg:
Dpmu.txt9 PMU node bindings definition
19 Definition: must be "csky,csky-pmu"
23 Definition: must be pmu irq num defined by soc
27 Definition: the width of pmu counter
/Documentation/devicetree/bindings/timer/
Dcsky,gx6605s-timer.txt9 timer node bindings definition
19 Definition: must be "csky,gx6605s-timer"
23 Definition: <phyaddr size> in soc from cpu view
27 Definition: must be input clk node
31 Definition: must be timer irq num defined by soc
Dcsky,mptimer.txt14 timer node bindings definition
24 Definition: must be "csky,mptimer"
28 Definition: must be input clk node
32 Definition: must be timer irq num defined by soc
/Documentation/devicetree/bindings/clock/
Dqcom,krait-cc.txt8 Definition: must be one of:
15 Definition: must be 1
20 Definition: reference to the clock parents of hfpll, secondary muxes.
25 Definition: must be "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb".
/Documentation/devicetree/bindings/crypto/
Dfsl-sec6.txt23 Definition: Must include "fsl,sec-v6.0".
28 Definition: A standard property. Define the 'ERA' of the SEC
34 Definition: A standard property. Defines the number of cells
40 Definition: A standard property. Defines the number of cells
47 Definition: A standard property. Specifies the physical
53 Definition: A standard property. Specifies the physical address
84 Definition: Must include "fsl,sec-v6.0-job-ring".
89 Definition: Specifies a two JR parameters: an offset from
95 Definition: Specifies the interrupts generated by this
/Documentation/devicetree/bindings/powerpc/
Dibm,powerpc-cpu-features.txt38 Definition: "ibm,powerpc-cpu-features"
48 Definition:
62 Definition:
86 Definition:
97 Definition:
113 Definition:
132 Definition:
151 Definition: HFSCR bit position (LSB0)
164 Definition: FSCR bit position (LSB0)
177 Definition: Linux ELF AUX vector bit position (LSB0)
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/Documentation/devicetree/bindings/interrupt-controller/
Dcsky,mpintc.txt8 Interrupt number definition:
20 intc node bindings definition
30 Definition: must be "csky,mpintc"
34 Definition: <2>
Dcsky,apb-intc.txt13 intc node bindings definition
23 Definition: must be "csky,apb-intc"
29 Definition: must be <1>
33 Definition: <phyaddr size> in soc from cpu view
/Documentation/devicetree/bindings/pci/
Dpcie-al.txt12 Definition: Value should contain
19 Definition: Register ranges as listed in the reg-names property
24 Definition: Must include the following entries
/Documentation/devicetree/bindings/iio/adc/
Davia-hx711.yaml29 Definition of the GPIO for the clock (output). In the datasheet it is
35 Definition of the GPIO for the data-out sent by the sensor in
43 Definition of the regulator used as analog supply
/Documentation/devicetree/bindings/media/i2c/
Dadv7343.txt6 definition (SD), enhanced definition (ED), or high definition (HD) video
Dovti,ov02a10.yaml45 Definition of the regulator used as Digital I/O voltage supply.
49 Definition of the regulator used as Analog voltage supply.
53 Definition of the regulator used as Digital core voltage supply.
87 Definition of MIPI clock voltage unit. This entry corresponds to
Donnn,ar0521.yaml31 Definition of the regulator used as analog (2.7 V) voltage supply.
35 Definition of the regulator used as digital core (1.2 V) voltage supply.
39 Definition of the regulator used as digital I/O (1.8 V) voltage supply.
/Documentation/devicetree/bindings/iio/proximity/
Ddevantech-srf04.yaml36 Definition of the GPIO for the triggering (output)
45 Definition of the GPIO for the echo (input)
56 Definition of the GPIO for power management of connected peripheral
/Documentation/ABI/testing/
Dsysfs-bus-pci-devices-pvpanic11 Detailed bit definition refers to section <Bit Definition>

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