Searched full:describes (Results 1 – 25 of 661) sorted by relevance
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| /Documentation/ABI/testing/ |
| D | sysfs-devices-physical_location | 13 Describes which panel surface of the system’s housing the
20 Describes vertical position of the device connection point on
27 Describes horizontal position of the device connection point on
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| D | sysfs-hypervisor-xen | 17 Describes mode that Xen's performance-monitoring unit (PMU)
35 Describes Xen PMU features (as an integer). A set bit indicates
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| D | sysfs-bus-i3c | 53 This entry describes the BCR of the master controller driving
63 This entry describes the DCR of the master controller driving
75 This entry describes the PID of the master controller driving
88 This entry describes the HDRCAP of the master controller
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| D | sysfs-devices-firmware_node | 14 that describes the device as provided by the _STR method in the ACPI
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| /Documentation/devicetree/bindings/clock/ti/davinci/ |
| D | pll.txt | 26 Describes the main PLL clock output (before POSTDIV). The node name must
33 Describes the PLLDIVn divider clocks that provide the SYSCLKn clock
41 Describes the AUXCLK output of the PLL. The node name must be "auxclk".
48 Describes the OBSCLK output of the PLL. The node name must be "obsclk".
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| /Documentation/devicetree/bindings/x86/ |
| D | ce4100.txt | 30 A "cpu" node describes one logical processor (hardware thread).
44 This node describes the in-core peripherals. Required property:
49 This node describes the PCI bus on the SoC. Its property should be
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| /Documentation/devicetree/bindings/powerpc/ |
| D | ibm,powerpc-cpu-features.txt | 12 This device tree binding describes CPU features available to software, with
104 This property describes the privilege levels and/or software components
118 This property describes the HV privilege support required to enable the
137 This property describes the OS privilege support required to enable the
154 property describes the bit number in the HFSCR register that the
167 property describes the bit number in the FSCR register that the
180 This property describes the bit number that should be set in the ELF AUX
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| /Documentation/devicetree/bindings/regulator/ |
| D | samsung,s5m8767.yaml | 36 Describes the different operating modes of the LDO's with power mode
60 Describes the different operating modes of the regulator with power
85 Describes the different operating modes of the regulator with power
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| /Documentation/devicetree/bindings/net/ |
| D | marvell-orion-net.txt | 9 first level describes the ethernet controller itself and the second level
10 describes up to 3 ethernet port nodes within that controller. The reason for
12 set of controller registers. Each port node describes port-specific properties.
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| /Documentation/devicetree/bindings/firmware/xilinx/ |
| D | xlnx,zynqmp-firmware.yaml | 12 description: The zynqmp-firmware node describes the interface to platform
61 description: The gpio node describes connect to PS_MODE pins via firmware
86 description: The zynqmp-power node describes the power management
92 description: The reset-controller node describes connection to the reset
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| /Documentation/arch/arm/ |
| D | setup.rst | 5 The following document describes the kernel initialisation parameter
55 This describes the character position of cursor on VGA console, and
85 This describes the kernel virtual start address and size of the
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| /Documentation/devicetree/bindings/mailbox/ |
| D | mediatek,gce-mailbox.yaml | 35 The first cell describes the Thread ID of the GCE,
36 the second cell describes the priority of the GCE thread
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ts4800-ts.txt | 8 describes the FPGA's syscon registers.
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| /Documentation/filesystems/ext4/ |
| D | checksums.rst | 26 The following table describes the data elements that go into each type
27 of checksum. The checksum function is whatever the superblock describes
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| /Documentation/devicetree/bindings/gpio/ |
| D | nvidia,tegra186-gpio.yaml | 17 significant differences. Hence, this document describes closely related but
41 Tegra HW documentation describes a unified naming convention for all GPIOs
54 <dt-bindings/gpio/tegra186-gpio.h> describes the port-level mapping. In
109 ports, in the order the HW manual describes them. The number of entries
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| /Documentation/firmware-guide/ |
| D | index.rst | 7 This section describes the ACPI subsystem in Linux from firmware perspective.
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | xilinx-xadc.txt | 3 This binding document describes the bindings for the Xilinx 7 Series XADC as well
11 document describes the bindings for both of them since the bindings are very
18 called the Xilinx System Management Wizard. This document describes the bindings
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| /Documentation/devicetree/bindings/display/imx/ |
| D | ldb.txt | 48 or a display-timings node that describes the video timings for the connected
66 - display-timings : A node that describes the display timings as defined in
69 This describes how the color bits are laid out in the
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| /Documentation/admin-guide/perf/ |
| D | imx-ddr.rst | 16 The "format" directory describes format of the config (event ID) and config1/2
18 devices/imx8_ddr0/format/. The "events" directory describes the events types
20 devices/imx8_ddr0/events/. The "caps" directory describes filter features implemented
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| D | hns3-pmu.rst | 24 The "events" directory describes the event code of all supported events
27 The "filtermode" directory describes the supported filter modes of each
30 The "format" directory describes all formats of the config (events) and
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| D | cxl.rst | 34 The "format" directory describes all formats of the config (event vendor id,
37 describes all documented events show in perf list.
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| /Documentation/arch/riscv/ |
| D | uabi.rst | 48 The "isa" line in /proc/cpuinfo describes the lowest common denominator of
50 "hart isa" line, in contrast, describes the set of extensions recognized by the
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| /Documentation/devicetree/bindings/phy/ |
| D | socionext,uniphier-usb3ss-phy.yaml | 10 This describes the devicetree bindings for PHY interfaces built into
13 this describes about Super-Speed PHY.
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| /Documentation/devicetree/bindings/watchdog/ |
| D | ts4800-wdt.txt | 6 describes the FPGA's syscon registers.
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| /Documentation/admin-guide/hw-vuln/ |
| D | index.rst | 5 This section describes CPU vulnerabilities and provides an overview of the
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