Searched full:diagram (Results 1 – 25 of 93) sorted by relevance
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| /Documentation/devicetree/bindings/phy/ |
| D | hisilicon,hi3660-usb3.yaml | 29 hisilicon,eye-diagram-param:
32 description: Eye diagram for phy.
38 - hisilicon,eye-diagram-param
50 hisilicon,eye-diagram-param = <0x22466e4>;
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| D | hisilicon,hi3670-usb3.yaml | 34 hisilicon,eye-diagram-param:
37 description: Eye diagram for phy.
48 - hisilicon,eye-diagram-param
62 hisilicon,eye-diagram-param = <0xfdfee4>;
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| D | hisilicon,phy-hi3670-pcie.yaml | 45 hisilicon,eye-diagram-param:
47 description: Eye diagram for phy.
55 - hisilicon,eye-diagram-param
79 hisilicon,eye-diagram-param = <0xffffffff 0xffffffff
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| D | qcom,usb-hs-phy.yaml | 80 This is related to Device Mode Eye Diagram test.
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-edp.yaml | 37 vast majority of panel datasheets have a power sequence diagram that
39 cares about different timings in this diagram but the fact that the
40 diagram is so similar means we can come up with a single driver to
45 sequence. This is because much of this diagram comes straight from
102 from power on (timing T3 in the diagram above). If we have no way to
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| /Documentation/gpu/amdgpu/display/ |
| D | dcn-overview.rst | 8 generic diagram, and we have variations per ASIC.
12 Based on this diagram, we can pass through each block and briefly describe
51 The above diagram is an architecture generalization of DCN, which means that
62 sophisticated communication interface which is highlighted in the diagram by
158 The first thing to notice from the diagram and DTN log it is the fact that we
162 we can split this single pipe differently, as described in the below diagram:
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| /Documentation/scsi/scsi_transport_srp/ |
| D | figures.rst | 3 SCSI RDMA (SRP) transport class diagram
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| /Documentation/devicetree/bindings/net/ |
| D | hisilicon-hns-nic.txt | 17 port-id can be 2 to 7. Here is the diagram:
44 to the CPU. The port-idx-in-ae can be 0 to 5. Here is the diagram:
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| /Documentation/driver-api/pldmfw/ |
| D | file-format.rst | 12 This diagram provides an overview of the file format::
57 The following diagram provides an overview of the package header::
90 The following diagram provides an overview of the device record area::
145 The following diagram provides an overview of the component area::
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| /Documentation/devicetree/bindings/soc/hisilicon/ |
| D | hisilicon,hi3660-usb3-otg-bc.yaml | 44 hisilicon,eye-diagram-param = <0x22466e4>;
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| /Documentation/RCU/Design/Memory-Ordering/ |
| D | Tree-RCU-Memory-Ordering.rst | 286 diagram above.
360 The diagram below shows the path of ordering if the leftmost
371 in the following diagram.
411 following diagram:
426 diagram happens after the start of the grace period. In addition, this
463 diagram, clearing bits from each ``rcu_node`` structure's ``->qsmask``
493 precede the idle period (the oval near the top of the diagram above)
497 the bottom of the diagram above).
556 | RCU. But this diagram is complex enough as it is, so simplicity |
559 | `stitched-together diagram <Putting It All Together_>`__. |
[all …]
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| /Documentation/driver-api/ |
| D | interconnect.rst | 22 Below is a simplified diagram of a real-world SoC interconnect bus topology.
56 The interconnect providers on the above diagram are M NoC, S NoC, C NoC, P NoC
62 providers. The point on the diagram where the CPUs connect to the memory is
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | starfive,jh7100-pinctrl.yaml | 15 interesting 2-layered approach to pin muxing best illustrated by the diagram
36 The big MUX in the diagram only has 7 different ways of mapping peripherals
40 diagram only shows UART0 and UART1, but this also includes a number of other
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| /Documentation/networking/ |
| D | mac80211-auth-assoc-deauth.txt | 5 # This can be converted into a diagram using the service
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-xgene-sb.txt | 5 as diagram below:
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| /Documentation/networking/device_drivers/ethernet/freescale/dpaa2/ |
| D | overview.rst | 31 The diagram below shows an overview of the DPAA2 resource management
84 types of DPAA2 objects. In the example diagram below there
144 The diagram below shows the objects needed for a simple
284 The diagram below shows the Linux drivers involved in a networking
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| /Documentation/leds/ |
| D | leds-mt6370-rgb.rst | 32 Pattern diagram::
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | mediatek,smi-larb.yaml | 14 The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
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| D | mediatek,smi-common.yaml | 14 The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
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| /Documentation/virt/gunyah/ |
| D | message-queue.rst | 18 The diagram below shows how message queue works. A typical configuration
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| /Documentation/PCI/endpoint/ |
| D | pci-ntb-function.rst | 20 In the below diagram, PCI NTB function configures the SoC with multiple
291 Above diagram shows Config region + Scratchpad region for HOST1 (connected to
296 diagram shows the case where Config region and Scratchpad regions are allocated
335 Above diagram shows how the doorbell and memory window 1 is mapped so that
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| /Documentation/admin-guide/media/ |
| D | vimc.rst | 18 :alt: Diagram of the default media pipeline topology
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| /Documentation/infiniband/ |
| D | opa_vnic.rst | 23 different virtual Ethernet switch. The below diagram presents a case
103 Intel OPA VNIC software design is presented in the below diagram.
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| /Documentation/bpf/ |
| D | map_hash.rst | 246 This algorithm is described visually in the following diagram. See the
251 :alt: Diagram outlining the LRU eviction steps taken during map update.
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-davinci.txt | 55 Below is timing diagram which shows functional meaning of
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