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/Documentation/devicetree/bindings/net/
Ddavinci_emac.txt1 * Texas Instruments Davinci EMAC
7 - compatible: "ti,davinci-dm6467-emac", "ti,am3517-emac" or
8 "ti,dm816-emac"
14 - interrupts: interrupt mapping for the davinci emac interrupts sources:
24 - ti,davinci-no-bd-ram: boolean, does EMAC have BD RAM?
30 eth0: emac@1e20000 {
31 compatible = "ti,davinci-dm6467-emac";
Dallwinner,sun8i-a83t-emac.yaml4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
7 title: Allwinner A83t EMAC
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
19 - const: allwinner,sun8i-v3s-emac
20 - const: allwinner,sun50i-a64-emac
23 - allwinner,sun20i-d1-emac
24 - allwinner,sun50i-h6-emac
26 - const: allwinner,sun50i-a64-emac
49 Phandle to the device containing the EMAC or GMAC clock
[all …]
Dibm,emac.txt1 4xx/Axon EMAC ethernet nodes
3 The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
7 below, the node for the OPB bus on which the EMAC sits must have a
10 i) The EMAC node itself
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
17 405gp, Axon) and second is either "ibm,emac" or
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
25 with this EMAC
27 with this EMAC
[all …]
Drockchip,emac.yaml4 $id: http://devicetree.org/schemas/net/rockchip,emac.yaml#
7 title: Rockchip RK3036/RK3066/RK3188 Ethernet Media Access Controller (EMAC)
15 - rockchip,rk3036-emac
16 - rockchip,rk3066-emac
17 - rockchip,rk3188-emac
42 Phandle to the syscon GRF used to control speed and mode for the EMAC.
69 const: rockchip,rk3036-emac
95 compatible = "rockchip,rk3188-emac";
Dallwinner,sun4i-a10-emac.yaml4 $id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml#
7 title: Allwinner A10 EMAC Ethernet Controller
18 const: allwinner,sun4i-a10-emac
49 emac: ethernet@1c0b000 {
50 compatible = "allwinner,sun4i-a10-emac";
Didt,3243x-emac.yaml4 $id: http://devicetree.org/schemas/net/idt,3243x-emac.yaml#
19 const: idt,3243x-emac
26 - const: emac
60 compatible = "idt,3243x-emac";
65 reg-names = "emac", "dma_rx", "dma_tx";
Dqcom-emac.txt1 Qualcomm Technologies EMAC Gigabit Ethernet Controller
11 - compatible : Should be "qcom,fsm9900-emac".
20 - compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".
36 compatible = "qcom,fsm9900-emac";
61 compatible = "qcom,fsm9900-emac-sgmii";
85 compatible = "qcom,fsm9900-emac";
107 compatible = "qcom,qdf2432-emac-sgmii";
Dactions,owl-emac.yaml4 $id: http://devicetree.org/schemas/net/actions,owl-emac.yaml#
24 - const: actions,owl-emac
27 - actions,s500-emac
28 - const: actions,owl-emac
77 compatible = "actions,s500-emac", "actions,owl-emac";
Dsocfpga-dwmac.txt18 bit for each emac to enable/disable signals from the FPGA fabric to the
19 EMAC modules.
24 altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
25 DWMAC controller is connected emac splitter.
Dloongson,ls1c-emac.yaml4 $id: http://devicetree.org/schemas/net/loongson,ls1c-emac.yaml#
29 - loongson,ls1c-emac
37 - loongson,ls1c-emac
87 emac: ethernet@1fe10000 {
88 compatible = "loongson,ls1c-emac", "snps,dwmac-3.50a";
Dsunplus,sp7021-emac.yaml5 $id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml#
19 const: sunplus,sp7021-emac
100 compatible = "sunplus,sp7021-emac";
Dcdns,macb.yaml18 - cdns,at91rm9200-emac # Atmel at91rm9200 SoC
19 - const: cdns,emac # Generic
55 - microchip,sama7g5-emac # Microchip SAMA7G5 ethernet interface
58 - cdns,emac # Generic
Dti,cpsw-switch.yaml109 ti,dual-emac-pvid:
206 ti,dual-emac-pvid = <1>;
216 ti,dual-emac-pvid = <2>;
Dsnps,dwmac.yaml52 - allwinner,sun8i-a83t-emac
53 - allwinner,sun8i-h3-emac
55 - allwinner,sun8i-v3s-emac
56 - allwinner,sun50i-a64-emac
609 - allwinner,sun8i-a83t-emac
610 - allwinner,sun8i-h3-emac
612 - allwinner,sun8i-v3s-emac
613 - allwinner,sun50i-a64-emac
Dmediatek,star-emac.yaml4 $id: http://devicetree.org/schemas/net/mediatek,star-emac.yaml#
Dcpsw.txt30 - dual_emac : Specifies Switch to act as Dual EMAC
Dti,icssg-prueth.yaml170 /* Example k3-am654 base board SR2.0, dual-emac */
/Documentation/devicetree/bindings/clock/
Dqcom,sa8775p-gcc.yaml37 - description: First EMAC controller reference clock
38 - description: Second EMAC controller reference clock
Dqcom,gcc-sc8280xp.yaml55 - description: First EMAC controller reference clock
56 - description: Second EMAC controller reference clock
Drockchip,rk3036-cru.yaml27 - "rmii_clkin" - external EMAC clock - optional
/Documentation/devicetree/bindings/phy/
Dintel,combo-phy.yaml13 Intel Combophy subsystem supports PHYs for PCIe, EMAC and SATA
/Documentation/devicetree/bindings/
Dxilinx.txt114 iii) Xilinx EMAC and Xilinx TEMAC
/Documentation/networking/device_drivers/ethernet/ti/
Dcpsw_switchdev.rst26 - The new (cpsw_new.c) driver is operating in dual-emac mode by default, thus
Dcpsw.rst308 (prints and scheme for AM572x evm, for dual emac boards only)