Searched full:emmc (Results 1 – 25 of 60) sorted by relevance
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| /Documentation/devicetree/bindings/phy/ |
| D | intel,lgm-emmc-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
7 title: Intel Lightning Mountain(LGM) eMMC PHY
13 Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
14 node is used to reference the base address of eMMC phy registers.
16 The eMMC PHY node should be the child of a syscon node with the
27 - intel,lgm-emmc-phy
28 - intel,keembay-emmc-phy
59 emmc_phy: emmc-phy@a8 {
60 compatible = "intel,lgm-emmc-phy";
62 clocks = <&emmc>;
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| D | rockchip,rk3399-emmc-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/rockchip,rk3399-emmc-phy.yaml#
7 title: Rockchip EMMC PHY
14 const: rockchip,rk3399-emmc-phy
58 compatible = "rockchip,rk3399-emmc-phy";
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| /Documentation/devicetree/bindings/mmc/ |
| D | allwinner,sun4i-a10-mmc.yaml | 25 - const: allwinner,sun8i-a83t-emmc
28 - const: allwinner,sun50i-a64-emmc
30 - const: allwinner,sun50i-a100-emmc
36 - const: allwinner,sun8i-r40-emmc
37 - const: allwinner,sun50i-a64-emmc
42 - const: allwinner,sun50i-h5-emmc
43 - const: allwinner,sun50i-a64-emmc
48 - const: allwinner,sun50i-h6-emmc
49 - const: allwinner,sun50i-a64-emmc
54 - const: allwinner,sun20i-d1-emmc
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| D | mmc-pwrseq-emmc.yaml | 4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-emmc.yaml#
7 title: Simple eMMC hardware reset provider
13 The purpose of this driver is to perform standard eMMC hw reset
16 fix possible issues if bootloader has left eMMC card in initialized or
19 doesn't have hardware reset logic connected to emmc card and (limited or
20 broken) ROM bootloaders are unable to read second stage from the emmc
25 const: mmc-pwrseq-emmc
31 and then deasserted to perform eMMC card reset. To perform
45 compatible = "mmc-pwrseq-emmc";
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| D | marvell,xenon-sdhci.yaml | 76 - emmc 5.1 phy
77 - emmc 5.0 phy
79 Xenon support multiple types of PHYs. To select eMMC 5.1 PHY, set:
80 marvell,xenon-phy-type = "emmc 5.1 phy" eMMC 5.1 PHY is the default
81 choice if this property is not provided. To select eMMC 5.0 PHY, set:
82 marvell,xenon-phy-type = "emmc 5.0 phy"
84 All those types of PHYs can support eMMC, SD and SDIO. Please note that
86 entire SDHC type or property. For example, "emmc 5.1 phy" doesn't mean
87 that this Xenon SDHC only supports eMMC 5.1.
96 Only available for eMMC PHY.
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| D | mmc-controller.yaml | 50 Non-removable slot (like eMMC); assume always present.
93 - for eMMC, the maximum supported frequency is 200MHz,
112 line. Not used in combination with eMMC or SDIO.
173 eMMC hardware reset is supported
193 eMMC high-speed DDR mode (1.2V I/O) is supported.
198 eMMC high-speed DDR mode (1.8V I/O) is supported.
203 eMMC high-speed DDR mode (3.3V I/O) is supported.
208 eMMC HS200 mode (1.2V I/O) is supported.
213 eMMC HS200 mode (1.8V I/O) is supported.
218 eMMC HS400 mode (1.2V I/O) is supported.
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| D | arasan,sdhci.yaml | 30 - xlnx,versal-net-emmc
49 - const: rockchip,rk3399-sdhci-5.1 # rk3399 eMMC PHY
66 - const: xlnx,versal-net-emmc # Versal Net eMMC PHY
71 - const: intel,lgm-sdhci-5.1-emmc # Intel LGM eMMC PHY
83 - const: intel,keembay-sdhci-5.1-emmc # Intel Keem Bay eMMC PHY
254 compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1";
290 compatible = "intel,keembay-sdhci-5.1-emmc", "arasan,sdhci-5.1";
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| D | sdhci-st.txt | 22 - pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller.
32 for eMMC on stih407 family silicon to configure DLL inside FlashSS.
49 supply in eMMC/SD specs.
62 /* Example stih416e eMMC configuration */
91 /* Example eMMC stih407 family configuration */
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| D | mmc-card.yaml | 7 title: MMC Card / eMMC Generic
14 child node describing a mmc-card / an eMMC.
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| D | amlogic,meson-mx-sdhc.yaml | 16 The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC
18 It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock).
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| D | amlogic,meson-gx-mmc.yaml | 7 title: Amlogic SD / eMMC controller for S905/GXBB family SoCs
11 interface for SD, eMMC and SDIO devices
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| D | cdns,sdhci.yaml | 7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
82 description: Value of the delay in the input path for eMMC high-speed DDR timing
146 emmc: mmc@5a000000 {
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| D | socionext,uniphier-sd.yaml | 7 title: UniPhier SD/SDIO/eMMC controller
40 hw: optional. exist if eMMC hw reset line is available
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| /Documentation/driver-api/mmc/ |
| D | mmc-tools.rst | 16 - Determine the eMMC writeprotect status.
17 - Set the eMMC writeprotect status.
18 - Set the eMMC data sector size to 4KB by disabling emulation.
25 - Enable the eMMC BKOPS feature.
26 - Permanently enable the eMMC H/W Reset feature.
27 - Permanently disable the eMMC H/W Reset feature.
33 - Enable the eMMC cache feature.
34 - Disable the eMMC cache feature.
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| /Documentation/devicetree/bindings/soc/intel/ |
| D | intel,lgm-syscon.yaml | 31 "^emmc-phy@[0-9a-f]+$":
32 $ref: /schemas/phy/intel,lgm-emmc-phy.yaml#
51 emmc-phy@a8 {
52 compatible = "intel,lgm-emmc-phy";
54 clocks = <&emmc>;
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| /Documentation/devicetree/bindings/arm/ |
| D | microchip,sparx5.yaml | 28 which has both spi-nor and eMMC storage. The modular design
36 either spi-nand or eMMC storage (mount option).
43 either spi-nand or eMMC storage (mount option).
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| D | sunxi.yaml | 463 - description: Lichee Zero Plus (with S3, without eMMC/SPI Flash)
651 - description: Olimex A20-Olimex SOM Evaluation Board (with eMMC)
653 - const: olimex,a20-olimex-som-evb-emmc
661 - description: Olimex A20-OlinuXino LIME (with eMMC)
663 - const: olimex,a20-olinuxino-lime-emmc
671 - description: Olimex A20-OlinuXino LIME2 (with eMMC)
673 - const: olimex,a20-olinuxino-lime2-emmc
681 - description: Olimex A20-OlinuXino Micro (with eMMC)
683 - const: olimex,a20-olinuxino-micro-emmc
691 - description: Olimex A20-SOM204 Evaluation Board (with eMMC)
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| D | fsl.yaml | 374 - phytec,imx6q-pbac06-emmc # PHYTEC phyBOARD-Mira eMMC RDK
561 - phytec,imx6dl-pbac06-emmc # PHYTEC phyBOARD-Mira eMMC RDK
640 - engicam,imx6ul-isiot # Engicam Is.IoT MX6UL eMMC/NAND Starter kit
673 - phytec,imx6ul-pbacd10-emmc
722 - toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module
761 - phytec,imx6ull-pbacd10-emmc
770 - phytec,imx6ull-phygate-tauri-emmc
786 - description: i.MX6ULL Boards with Toradex Colibri iMX6ULL 1GB (eMMC) Module
789 - toradex,colibri-imx6ull-emmc-aster # Aster Carrier Board
790 - toradex,colibri-imx6ull-emmc-eval # Colibri Evaluation B. V3
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| /Documentation/ABI/testing/ |
| D | sysfs-platform-mellanox-bootctl | 35 emmc boot from the onchip eMMC
36 emmc_legacy boot from the onchip eMMC in legacy (slow) mode
50 emmc boot from the onchip eMMC
51 emmc_legacy boot from the onchip eMMC in legacy (slow) mode
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | armada-37xx.yaml | 31 - globalscale,espressobin-emmc
41 - globalscale,espressobin-v7-emmc
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| /Documentation/block/ |
| D | cmdline-partition.rst | 8 It is typically used for fixed block (eMMC) embedded devices.
44 eMMC disk names are "mmcblk0" and "mmcblk0boot0".
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| /Documentation/admin-guide/perf/ |
| D | meson-ddr-pmu.rst | 45 + sd_emmc_b - from SD eMMC b controller
48 + sd_emmc_c - from SD eMMC c controller
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | realtek,rtd1315e-pinctrl.yaml | 55 enum: [ gpio, nf, emmc, ao, gspi_loc0, gspi_loc1, uart0, uart1,
166 emmc-hs200-pins {
177 function = "emmc";
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| D | realtek,rtd1619b-pinctrl.yaml | 57 spdif_optical_loc1, emmc_spi, emmc, sc1, uart0, uart1, uart2_loc0, uart2_loc1,
164 emmc-hs200-pins {
175 function = "emmc";
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| /Documentation/devicetree/bindings/mtd/ |
| D | amlogic,meson-nand.yaml | 27 - const: emmc
108 reg-names = "nfc", "emmc";
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