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/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic-v3.yaml77 - GIC CPU interface (GICC)
81 GICC, GICH and GICV are optional, but must be described if the CPUs
251 <0x2c000000 0x2000>, // GICC
280 <0x2c040000 0x2000>, // GICC
/Documentation/arch/arm64/
Dcpu-hotplug.rst34 boot to discover the system wide supported features. ACPI's MADT GICC
64 ``enabled`` in the MADT GICC structures, but should have the ``online capable``
Dacpi_object_usage.rst420 Optional, but if used, only the GICC Affinity structures are read.