Searched full:handle (Results 1 – 25 of 739) sorted by relevance
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| /Documentation/devicetree/bindings/net/bluetooth/ |
| D | qualcomm-bluetooth.yaml | 45 description: VDD_IO supply regulator handle
48 description: VDD_XO supply regulator handle
51 description: VDD_RF supply regulator handle
54 description: VDD_CH0 supply regulator handle
57 description: VDD_CH1 supply regulator handle
60 description: VDD_AON supply regulator handle
63 description: VDD_DIG supply regulator handle
66 description: VDD_BT_CMX supply regulator handle
69 description: VDD_BT_CXMX supply regulator handle
72 description: VDD_RFA_CMN supply regulator handle
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| /Documentation/devicetree/bindings/regulator/ |
| D | qcom,qca6390-pmu.yaml | 25 description: VDD supply regulator handle
28 description: VDD_AON supply regulator handle
31 description: VDD_DIG supply regulator handle
34 description: VDD_PMU supply regulator handle
37 description: VDD_IO_1P2 supply regulator handle
40 description: VDD_RFA_0P95 supply regulator handle
43 description: VDD_RFA_1P2 supply regulator handle
46 description: VDD_RFA_1P3 supply regulator handle
49 description: VDD_RFA_1P8 supply regulator handle
52 description: VDD_RFA_1P9 supply regulator handle
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| D | active-semi,act8846.yaml | 32 description: Handle to the INL1 input supply (REG5-7)
35 description: Handle to the INL2 input supply (REG8-9)
38 description: Handle to the INL3 input supply (REG10-12)
41 description: Handle to the VP1 input supply (REG1)
44 description: Handle to the VP2 input supply (REG2)
47 description: Handle to the VP3 input supply (REG3)
50 description: Handle to the VP4 input supply (REG4)
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| /Documentation/devicetree/bindings/net/wireless/ |
| D | qcom,ath11k-pci.yaml | 33 description: VDD_RFA_CMN supply regulator handle
36 description: VDD_AON supply regulator handle
39 description: VDD_WL_CX supply regulator handle
42 description: VDD_WL_MX supply regulator handle
45 description: VDD_RFA_0P8 supply regulator handle
48 description: VDD_RFA_1P2 supply regulator handle
51 description: VDD_RFA_1P7 supply regulator handle
54 description: VDD_PCIE_0P9 supply regulator handle
57 description: VDD_PCIE_1P8 supply regulator handle
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| D | qcom,ath12k.yaml | 26 description: VDD_AON supply regulator handle
29 description: VDD_WLCX supply regulator handle
32 description: VDD_WLMX supply regulator handle
35 description: VDD_RFA_CMN supply regulator handle
38 description: VDD_RFA_0P8 supply regulator handle
41 description: VDD_RFA_1P2 supply regulator handle
44 description: VDD_RFA_1P8 supply regulator handle
47 description: VDD_PCIE_0P9 supply regulator handle
50 description: VDD_PCIE_1P8 supply regulator handle
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| /Documentation/driver-api/media/ |
| D | v4l2-fh.rst | 6 struct v4l2_fh provides a way to easily keep file handle specific
19 struct v4l2_fh is allocated as a part of the driver's own file handle
29 Drivers can extract their own file handle structure by using the container_of
82 - Initialise the file handle. This **MUST** be performed in the driver's
89 - Add a :c:type:`v4l2_fh` to :c:type:`video_device` file handle list.
90 Must be called once the file handle is completely initialized.
95 - Unassociate the file handle from :c:type:`video_device`. The file handle
101 - Uninitialise the file handle. After uninitialisation the :c:type:`v4l2_fh`
122 Several drivers need to do something when the first file handle is opened and
123 when the last file handle closes. Two helper functions were added to check
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| /Documentation/crypto/ |
| D | intro.rst | 19 Therefore, a cipher handle variable usually has the name "tfm". Besides
56 to as a "cipher handle". Such a cipher handle is always subject to the
58 a cipher handle:
60 1. Initialization of a cipher handle.
62 2. Execution of all intended cipher operations applicable for the handle
63 where the cipher handle must be furnished to every API call.
65 3. Destruction of a cipher handle.
67 When using the initialization API calls, a cipher handle is created and
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| /Documentation/devicetree/bindings/net/ |
| D | fsl,fman-dtsec.yaml | 17 Ethernet Media Access Controller (mEMAC) to handle all speeds.
96 pcsphy-handle:
101 description: See pcs-handle.
103 pcs-handle:
108 pcs-handle-names is absent, and phy-connection-type is "xgmii", then the first
109 reference will be assumed to be for "xfi". Otherwise, if pcs-handle-names is
112 pcs-handle-names:
120 description: The type of each PCS in pcsphy-handle.
122 tbi-handle:
133 pcs-handle-names:
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| D | hisilicon-hip04-net.txt | 9 - port-handle: <phandle port channel>
17 - phy-handle: see ethernet.txt [1].
60 port-handle = <&ppe 31 0 31>;
68 port-handle = <&ppe 0 1 0>;
69 phy-handle = <&phy0>;
77 port-handle = <&ppe 8 2 8>;
78 phy-handle = <&phy1>;
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| D | intel,ixp4xx-ethernet.yaml | 48 phy-handle: true
50 intel,npe-handle:
69 - intel,npe-handle
85 intel,npe-handle = <&npe 1>;
87 phy-handle = <&phy1>;
95 intel,npe-handle = <&npe 2>;
97 phy-handle = <&phy2>;
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| D | hisilicon-hns-dsaf.txt | 26 - phy-handle: phy handle of physical port, 0 if not any phy device. It is optional
27 attribute. If port node exists, phy-handle in each port node will be used.
29 - subctrl-syscon: is syscon handle for external interface control register.
38 - phy-handle: phy handle of physical port. It is not required if there isn't
40 - serdes-syscon: is syscon handle for SerDes register.
41 - cpld-syscon: is syscon handle + register offset pair for cpld register. It is
80 phy-handle = <&phy0>;
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| D | xlnx,gmii-to-rgmii.yaml | 31 phy-handle:
32 $ref: ethernet-controller.yaml#/properties/phy-handle
41 - phy-handle
57 phy-handle = <&phy>;
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| D | cavium-pip.txt | 38 - phy-handle: Optional, see ethernet.txt file in the same directory.
64 phy-handle = <&phy2>;
70 phy-handle = <&phy3>;
76 phy-handle = <&phy4>;
82 phy-handle = <&phy5>;
96 phy-handle = <&phy6>;
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| D | ethernet-controller.yaml | 111 pcs-handle:
117 bus to link with an external PHY (phy-handle) if exists.
119 pcs-handle-names:
121 The name of each PCS in pcs-handle.
123 phy-handle:
129 $ref: "#/properties/phy-handle"
133 $ref: "#/properties/phy-handle"
262 pcs-handle-names: [pcs-handle]
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| D | fsl,qoriq-mc-dpmac.yaml | 27 pcs-handle:
51 phy-handle = <&mdio1_phy6>;
54 pcs-handle = <&pcs3_1>;
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| D | cirrus,ep9301-eth.yaml | 36 phy-handle: true
47 - phy-handle
58 phy-handle = <&phy0>;
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| /Documentation/userspace-api/gpio/ |
| D | chardev_v1.rst | 21 :ref:`gpio-v1-line-handle`, and the :ref:`gpio-v1-line-event`.
39 and the resulting line handle is used to access the GPIO chip's lines, or
54 Get Line Handle <gpio-get-linehandle-ioctl>
62 .. _gpio-v1-line-handle:
64 Line Handle
68 access to a set of requested lines. The line handle is exposed to userspace
72 Within this documentation, the line handle file descriptor is referred to
78 The following operations may be performed on the line handle:
83 Get Line Values <gpio-handle-get-line-values-ioctl>
84 Set Line Values <gpio-handle-set-line-values-ioctl>
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| /Documentation/admin-guide/cgroup-v1/ |
| D | net_cls.rst | 17 values is 0xAAAABBBB; AAAA is the major handle number and BBBB
18 is the minor handle number.
28 - setting a 10:1 handle::
35 tc qdisc add dev eth0 root handle 10: htb
40 tc filter add dev eth0 parent 10: protocol ip prio 10 handle 1: cgroup
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | marvell,mv88e6xxx.yaml | 149 phy-handle = <&sw_phy0>;
156 phy-handle = <&sw_phy1>;
163 phy-handle = <&sw_phy2>;
170 phy-handle = <&sw_phy3>;
274 phy-handle = <&switch0phy1>;
280 phy-handle = <&switch0phy2>;
286 phy-handle = <&switch0phy3>;
292 phy-handle = <&switch0phy4>;
298 phy-handle = <&switch0phy5>;
304 phy-handle = <&switch0phy6>;
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| D | mscc,ocelot.yaml | 113 phy-handle = <&phy0>;
120 phy-handle = <&phy1>;
127 phy-handle = <&phy2>;
134 phy-handle = <&phy3>;
182 phy-handle = <&phy0>;
189 phy-handle = <&phy1>;
196 phy-handle = <&phy2>;
203 phy-handle = <&phy3>;
210 phy-handle = <&phy4>;
217 phy-handle = <&phy5>;
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| D | microchip,lan937x.yaml | 99 phy-handle = <&t1phy0>;
106 phy-handle = <&t1phy1>;
113 phy-handle = <&t1phy2>;
120 phy-handle = <&t1phy3>;
153 phy-handle = <&t1phy6>;
160 phy-handle = <&t1phy7>;
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| D | qca8k.yaml | 172 phy-handle = <&external_phy_port1>;
178 phy-handle = <&external_phy_port2>;
184 phy-handle = <&external_phy_port3>;
190 phy-handle = <&external_phy_port4>;
196 phy-handle = <&external_phy_port5>;
232 phy-handle = <&internal_phy_port1>;
258 phy-handle = <&internal_phy_port2>;
265 phy-handle = <&internal_phy_port3>;
272 phy-handle = <&internal_phy_port4>;
279 phy-handle = <&internal_phy_port5>;
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| /Documentation/devicetree/bindings/display/panel/ |
| D | sharp,ls060t1sx01.yaml | 27 description: handle of the regulator that provides the positive supply voltage
29 description: handle of the regulator that provides the negative supply voltage
31 description: handle of the regulator that provides the I/O supply voltage
33 description: handle of the regulator that provides the analog supply voltage
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| /Documentation/power/ |
| D | pm_qos_interface.rst | 31 void cpu_latency_qos_add_request(handle, target_value):
35 Clients of PM QoS need to save the returned handle for future use in other
38 void cpu_latency_qos_update_request(handle, new_target_value):
39 Will update the list element pointed to by the handle with the new target
43 void cpu_latency_qos_remove_request(handle):
51 int cpu_latency_qos_request_active(handle):
106 int dev_pm_qos_add_request(device, handle, type, value):
110 Clients of dev_pm_qos need to save the handle for future use in other
113 int dev_pm_qos_update_request(handle, new_value):
114 Will update the list element pointed to by the handle with the new target
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| /Documentation/dev-tools/ |
| D | kcov.rst | 237 collection sections. The way a handle is used depends on the context where the
252 For #1 and #3, a unique global handle must be chosen and passed to the
254 this handle to ``KCOV_REMOTE_ENABLE`` in the ``handles`` array field of the
256 section referenced by this handle. Multiple global handles identifying
259 For #2, the userspace process instead must pass a non-zero handle through the
260 ``common_handle`` field of the ``kcov_remote_arg`` struct. This common handle
263 modifications. Those tasks should in turn use the passed handle in their
267 handle is a ``u64`` integer. Currently, only the one top and the lower 4 bytes
270 For global handles, the top byte of the handle denotes the id of a subsystem
271 this handle belongs to. For example, KCOV uses ``1`` as the USB subsystem id.
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