Searched full:hold (Results 1 – 25 of 245) sorted by relevance
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| /Documentation/devicetree/bindings/sound/ |
| D | maxim,max98504.yaml | 44 Brownout attenuation to the speaker gain applied during the "attack hold" 45 and "timed hold" phase, the value must be from 0...6 (dB) range. 47 maxim,brownout-attack-hold-ms: 51 Brownout attack hold phase time in ms, VBATBROWN_ATTK_HOLD, register 0x0018. 53 maxim,brownout-timed-hold-ms: 57 Brownout timed hold phase time in ms, VBATBROWN_TIME_HOLD, register 0x0019.
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| /Documentation/leds/ |
| D | leds-qcom-lpg.rst | 35 The pattern is a series of brightness and hold-time pairs, with the hold-time 36 expressed in milliseconds. The hold time is a property of the pattern and must 54 The LPG supports specifying a longer hold-time for the first and last element 69 Similarly, the last entry can be stretched by using a higher hold-time on the 77 specified hold-time of the middle item in the pattern is allowed to have a 78 different hold-time.
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | st,stm32-fmc2-ebi-props.yaml | 92 st,fmc2-ebi-cs-address-hold-ns: 93 description: This property defines the duration of the address hold 105 st,fmc2-ebi-cs-data-hold-ns: 106 description: This property defines the duration of the data hold phase 121 st,fmc2-ebi-cs-write-address-hold-ns: 122 description: This property defines the duration of the address hold 134 st,fmc2-ebi-cs-write-data-hold-ns: 135 description: This property defines the duration of the data hold phase
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| D | ti-aemif.txt | 112 - ti,cs-read-hold-ns: read hold width, ns 129 - ti,cs-write-hold-ns: write hold width, ns 166 ti,cs-read-hold-ns = <7>; 169 ti,cs-write-hold-ns = <7>; 195 ti,cs-read-hold-ns = <8>; 198 ti,cs-write-hold-ns = <7>;
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| D | mvebu-devbus.txt | 71 - devbus,rd-hold-ps: Defines the time between the last data sample to the 79 Set <rd-hold-ps> to a value smaller than <turn-off-ps>. 99 This parameter defines the hold time of address and 146 devbus,rd-hold-ps = <0>;
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| D | intel,ixp4xx-expansion-peripheral-props.yaml | 34 description: Hold timing, extend hold phase with n cycles.
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| /Documentation/hwmon/ |
| D | abituguru-datasheet.rst | 40 after a reboot uGuru will hold 0x00 here, but if the driver is removed and 41 later on attached again data-port will hold 0x08, more about this later. 44 turned up which will hold 0x00 instead of 0xAC at the CMD port, thus we also 46 hold 0x09 and will only hold 0x08 after reading CMD first, so CMD must be read 88 to hold 0x09, DATA should read 0x09 within 250 read cycles. 90 Next CMD _must_ be read and should hold 0xAC, usually CMD will hold 0xAC the 94 After reading CMD, DATA should hold 0x08 which means that the uGuru is ready 95 for input. As above DATA will usually hold 0x08 the first read but not always. 103 First the uGuru must be in "ready" mode as described above, DATA should hold 107 wait for to DATA to hold 0x08 again indicating that it wants / is ready for [all …]
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| D | da9055.rst | 17 resolution and track and hold circuitry combined with an analogue input 19 different inputs. The track and hold circuit ensures stable input voltages at
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| D | da9052.rst | 18 resolution and track and hold circuitry combined with an analogue input 20 different inputs. The track and hold circuit ensures stable input voltages at
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| /Documentation/usb/ |
| D | gadget_hid.rst | 193 int keyboard_fill_report(char report[8], char buf[BUF_LEN], int *hold) 204 if (strcmp(tok, "--hold") == 0) { 205 *hold = 1; 246 int mouse_fill_report(char report[8], char buf[BUF_LEN], int *hold) 256 if (strcmp(tok, "--hold") == 0) { 257 *hold = 1; 297 int joystick_fill_report(char report[8], char buf[BUF_LEN], int *hold) 303 *hold = 1; 342 " --hold\n"); 352 " --hold\n"); [all …]
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| /Documentation/devicetree/bindings/power/reset/ |
| D | qcom,pshold.yaml | 13 A power supply hold (ps-hold) bit is set to power the Qualcomm chipsets.
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| D | restart-poweroff.txt | 4 by restarting and letting u-boot keep hold of the machine until the
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| /Documentation/devicetree/bindings/i2c/ |
| D | snps,designware-i2c.yaml | 46 ICPU_CFG:TWI_DELAY registers to setup the SDA hold time. 72 i2c-sda-hold-time-ns: 74 The property should contain the SDA hold time in nanoseconds. This option 121 i2c-sda-hold-time-ns = <300>;
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| D | atmel,at91sam-i2c.yaml | 86 i2c-sda-hold-time-ns: 88 TWD hold time 130 i2c-sda-hold-time-ns = <336>;
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| D | hisilicon,ascend910-i2c.yaml | 41 i2c-sda-hold-time-ns: 67 i2c-sda-hold-time-ns = <56>;
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | st,stm32-rproc.yaml | 38 description: remote processor reset hold boot 43 - description: The offset of the hold boot setting register 44 - description: The field mask of the hold boot 173 /* Hold boot managed using system config*/ 185 /* Hold boot managed using SCMI reset controller */
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| /Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.yaml | 124 qcom,xmem-write-hold-cycles: 129 asserted. With a hold of 1 (value = 0), the CS stays active 166 qcom,xmem-address-hold-enable: 169 Holds the address for an extra cycle to meet hold time 181 qcom,xmem-read-hold-cycles: 233 qcom,xmem-write-hold-cycles = <3>;
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| /Documentation/devicetree/bindings/mtd/ |
| D | lpc32xx-slc.txt | 16 - nxp,whold: Write hold time (W_HOLD) 19 - nxp,rhold: Read hold time (R_HOLD)
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| /Documentation/filesystems/iomap/ |
| D | operations.rst | 95 - ``iomap_valid``: The filesystem may not hold locks between 231 Callers typically hold ``i_rwsem`` and ``invalidate_lock`` in exclusive 242 Callers typically hold ``i_rwsem`` and ``invalidate_lock`` in exclusive 255 Callers typically hold ``i_rwsem`` and ``invalidate_lock`` in exclusive 492 Callers commonly hold ``i_rwsem`` in shared mode before calling this 516 Callers commonly hold ``i_rwsem`` in shared or exclusive mode before 580 Callers commonly hold ``i_rwsem`` in shared mode before calling this 602 Callers commonly hold ``i_rwsem`` in exclusive mode before calling this 615 Callers commonly hold the same locks as they do to call their iomap 630 Callers commonly hold the same locks as they do to call their iomap [all …]
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| /Documentation/devicetree/bindings/input/ |
| D | qcom,pm8921-keypad.yaml | 50 row-hold: 86 row-hold = <91500>;
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | sophgo,cv1800-pinctrl.yaml | 49 and bus hold state. In addition, all pins in the same subnode 84 bias-bus-hold: true
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-coresight-devices-funnel | 5 Description: (RW) Enables the slave ports and defines the hold time of the
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| /Documentation/virt/kvm/x86/ |
| D | msr.rst | 25 in guest RAM. This memory is expected to hold a copy of the following 64 guest RAM, plus an enable bit in bit 0. This memory is expected to hold 195 Bits 63-6 hold 64-byte aligned physical address of a 64 byte memory area 196 which must be in guest RAM. This memory is expected to hold the 265 hold a copy of the following structure:: 312 interrupt is enabled (bit 0 set), bits 63-2 hold a 4-byte aligned
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | azoteq,iqs7211.yaml | 289 "^event-(tap(-double|-triple)?|hold|palm|swipe-(x|y)-(pos|neg)(-hold)?)$": 315 description: Specifies the minimum duration of hold gestures. 322 Specifies the minimum (swipe) or maximum (tap and hold) distance 726 event-hold { 738 event-swipe-x-pos-hold { 746 event-swipe-x-neg-hold { 754 event-swipe-y-pos-hold { 762 event-swipe-y-neg-hold {
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | atmel,sama9260-adc.yaml | 66 atmel,adc-sample-hold-time: 68 description: Sample and Hold Time in microseconds
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