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/Documentation/devicetree/bindings/ptp/
Dptp-idtcm.yaml7 title: IDT ClockMatrix (TM) PTP Clock
16 - idt,8a34000
17 - idt,8a34001
18 - idt,8a34002
19 - idt,8a34003
20 - idt,8a34004
21 - idt,8a34005
22 - idt,8a34006
23 - idt,8a34007
24 - idt,8a34008
[all …]
Dptp-idt82p33.yaml7 title: IDT 82P33 PTP Clock
10 IDT 82P33XXX Synchronization Management Unit (SMU) based PTP clock
18 - idt,82p33810
19 - idt,82p33813
20 - idt,82p33814
21 - idt,82p33831
22 - idt,82p33910
23 - idt,82p33913
24 - idt,82p33914
25 - idt,82p33931
[all …]
/Documentation/devicetree/bindings/clock/
Didt,versaclock5.yaml4 $id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
7 title: IDT VersaClock 5 and 6 programmable I2C clock generators
10 The IDT VersaClock 5 and VersaClock 6 are programmable I2C
33 The idt,shutdown and idt,output-enable-active properties control the
53 - idt,5p49v5923
54 - idt,5p49v5925
55 - idt,5p49v5933
56 - idt,5p49v5935
57 - idt,5p49v60
58 - idt,5p49v6901
[all …]
Darm,syscon-icst.yaml14 Devices Technology (IDT). ARM integrated these oscillators deeply into their
/Documentation/devicetree/bindings/misc/
Didt,89hpesx.yaml4 $id: http://devicetree.org/schemas/misc/idt,89hpesx.yaml#
7 title: EEPROM / CSR SMBus-slave interface of IDT 89HPESx devices
16 pattern: '^idt,89hpes'
23 - pattern: '^idt,89hpes(8nt2|12nt3|12n3a?|24n3a?|(12|24)t3g2|4t4g2|10t4g2|[56]t5|8t5a?)$'
24 - pattern: '^idt,89hpes(6t6g2|16t7|(24t6|32t8|48t12|16t4a?)(g2)?)$'
25 - pattern: '^idt,89hpes(24nt6a|32nt8[ab]|12nt12|16nt16|24nt24|32nt24[ab])g2$'
26 - pattern: '^idt,89hpes((32h8|48h12a?|22h16|34h16|64h16a?)(g2)?|16h16)$'
59 idt@74 {
60 compatible = "idt,89hpes32nt8ag2";
/Documentation/devicetree/bindings/net/
Didt,3243x-emac.yaml4 $id: http://devicetree.org/schemas/net/idt,3243x-emac.yaml#
7 title: IDT 79rc3243x Ethernet controller
9 description: Ethernet controller integrated into IDT 79RC3243x family SoCs
19 const: idt,3243x-emac
60 compatible = "idt,3243x-emac";
/Documentation/ABI/testing/
Dsysfs-bus-rapidio36 Alexandre Bounine <alexandre.bounine@idt.com>
44 Alexandre Bounine <alexandre.bounine@idt.com>
52 Alexandre Bounine <alexandre.bounine@idt.com>
60 Alexandre Bounine <alexandre.bounine@idt.com>
68 Alexandre Bounine <alexandre.bounine@idt.com>
77 Alexandre Bounine <alexandre.bounine@idt.com>
86 Alexandre Bounine <alexandre.bounine@idt.com>
95 Alexandre Bounine <alexandre.bounine@idt.com>
104 Alexandre Bounine <alexandre.bounine@idt.com>
112 Alexandre Bounine <alexandre.bounine@idt.com>
[all …]
Dsysfs-class-rapidio17 Alexandre Bounine <alexandre.bounine@idt.com>
29 Alexandre Bounine <alexandre.bounine@idt.com>
Dsysfs-bus-pci547 - idt (drive is not the right type for the connector)
553 - to signify drive state (ok, locate, fail, idt, disabled)
/Documentation/devicetree/bindings/interrupt-controller/
Didt,32434-pic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/idt,32434-pic.yaml#
7 title: IDT 79RC32434 Interrupt Controller
20 const: idt,32434-pic
42 compatible = "idt,32434-pic";
/Documentation/devicetree/bindings/gpio/
Didt,32434-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/idt,32434-gpio.yaml#
7 title: IDT 79RC32434 GPIO controller
14 const: idt,32434-gpio
53 compatible = "idt,32434-gpio";
/Documentation/devicetree/bindings/hwmon/
Djedec,jc42.yaml30 - idt,tse2002
31 - idt,tse2004
32 - idt,ts3000
33 - idt,ts3001
/Documentation/misc-devices/
Dics932s401.rst7 * IDT ICS932S401
13 Datasheet: Publicly available at the IDT website
20 This driver implements support for the IDT ICS932S401 chip family.
/Documentation/arch/x86/
Dentry_64.rst21 The IDT vector assignments are listed in arch/x86/include/asm/irq_vectors.h.
33 - interrupt: An array of entries. Every IDT vector that doesn't
47 the IDT entries push an error code onto the stack; others don't.
48 IDT entries using the IST alternative stack mechanism need their own
Dpti.rst23 (IDT). There are a few strictly unnecessary things that get mapped
/Documentation/driver-api/
Dxillybus.rst200 (IP core) is built. They are fetched from the IDT (the data structure which
330 Interface Description Table (IDT), is sent from the FPGA to the host. The
333 1. Acquire the length of the IDT, so a buffer can be allocated for it. This
335 for this command contains the IDT's buffer length.
337 2. Acquire the IDT itself.
339 3. Create the interfaces according to the IDT.
357 the IDT. The driver relies on a rule that the pipes are sorted with decreasing
358 buffer size in the IDT. If a requested buffer is larger or equal to a page,
Dptp.rst115 * Renesas (IDT) ClockMatrix™
/Documentation/arch/x86/x86_64/
Dfred.rst15 delivery through the interrupt descriptor table (IDT event
42 FRED operates differently from IDT in terms of event handling. Instead
/Documentation/driver-api/rapidio/
Dmport_cdev.rst10 Prodrive Technologies, Nokia Networks, BAE and IDT. Additional input was
72 - IDT Tsi721 PCIe-to-RapidIO bridge device and its mport device driver are fully
Dtsi721.rst2 RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
Drio_cm.rst11 Nokia Networks, BAE and IDT. Additional input was received from other members
/Documentation/hwmon/
Djc42.rst24 * IDT TSE2002B3, TSE2002GB2, TSE2004GB2, TS3000B3, TS3000GB0, TS3000GB2,
30 Available from IDT web site
/Documentation/sound/hd-audio/
Dcontrols.rst35 IDT/Sigmatel codecs
Dnotes.rst267 * IDT codecs may have extra power-enable/disable controls on each
/Documentation/devicetree/bindings/
Dvendor-prefixes.yaml677 "^idt,.*":

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