Home
last modified time | relevance | path

Searched full:in1 (Results 1 – 25 of 40) sorted by relevance

12

/Documentation/devicetree/bindings/sound/
Daxentia,tse850-pcm5142.txt16 IN1 +---o +------------+ o---+ OUT1
37 In the above, the 'loop1' relays are inactive, thus feeding IN1 to the mixer
39 are active, short-cutting the TSE-850 from channel 2. IN1, IN2, OUT1 and OUT2
Dmediatek,mt8188-afe.yaml97 mediatek,etdm-in1-cowork-source:
191 mediatek,etdm-in1-multi-pin-mode;
192 mediatek,etdm-in1-chn-disabled = /bits/ 8 <0x0 0x2>;
Drt5660.txt16 - realtek,in1-differential
Drt5665.txt15 - realtek,in1-differential
Dmaxim,max98090.yaml14 MIC1, MIC2, DMICL, DMICR, IN1, IN2, IN3, IN4, IN5, IN6, IN12, IN34, IN56,
Dsamsung,odroid.yaml82 "IN1", "Mic Jack",
Drt5640.txt18 - realtek,in1-differential
Dnvidia,tegra-audio-max98090.yaml51 - IN1
Drealtek,rt5677.yaml132 realtek,in1-differential;
Dcirrus,madera.yaml71 <IN1 IN2 IN3 ...>
/Documentation/devicetree/bindings/regulator/
Dmax8907.txt11 - in1-supply: The input supply for LDO1.
42 in1-supply = <&mbatt_reg>;
/Documentation/devicetree/bindings/mfd/
Dst,stm32-lptimer.yaml16 elements, from IN1 and IN2 input signals.
17 - simple counter from IN1 input signal.
/Documentation/iio/
Dad4695.rst91 reg = <1>; /* IN1 */
97 (*(raw + offset) × scale*) will be the voltage measured on the ``IN1`` pin
124 (*(raw + offset) × scale*) will be the voltage measured on the ``IN1`` pin
/Documentation/devicetree/bindings/pinctrl/
Dcirrus,madera.yaml66 opclk-async, pwm1, pwm2, spdif, asrc1-in1-lock,
67 asrc1-in2-lock, asrc2-in1-lock, asrc2-in2-lock,
/Documentation/hwmon/
Dpowr1220.rst38 in1 VMON2
Dltc4282.rst42 attributes are read-only. Note that in0 and in1 are mutually exclusive. Enabling
64 in1_reset_history Write 1 to reset in1 history.
Dw83795.rst41 14 VSEN2 (VCORE2) 11h in1
100 11 VSEN2 (VCORE2) 11h in1
Dw83781d.rst156 0x000002 in1
213 783s has no in1 so that in[2-6] are compatible with the 781d/782d.
371 - in1=r(0x21)*0.016
380 - in1=r(0x21)*0.016
389 - in1=r(0x21)*0.016
398 - in1=255
Dasb100.rst49 - 0x0002 => in1 (?)
Ddme1737.rst95 in1: Vccp (processor core) 0V - 3V
105 in1: Vccp (processor core) 0V - 2V
115 in1: Vccp (processor core) 0V - 3V
125 in1: Vccp (processor core) 0V - 3V
Dgl518sm.rst31 For the revision 0x00 chip, the in0, in1, and in2 values (+5V, +3V,
Dltc2945.rst61 in1_reset_history Write 1 to reset in1 history
Dltc2947.rst46 in0_reset_history Write 1 to reset in1 history
/Documentation/devicetree/bindings/iio/afe/
Dcurrent-sense-shunt.yaml53 channel@0 { /* IN0,IN1 differential */
/Documentation/devicetree/bindings/hwmon/
Dti,adc128d818.yaml35 (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6), 1 temperature reading (internal).

12