Searched full:ipi (Results 1 – 25 of 33) sorted by relevance
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| /Documentation/devicetree/bindings/mailbox/ |
| D | xlnx,zynqmp-ipi-mailbox.yaml | 4 $id: http://devicetree.org/schemas/mailbox/xlnx,zynqmp-ipi-mailbox.yaml#
7 title: Xilinx IPI(Inter Processor Interrupt) mailbox controller
10 The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
11 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI
15 | Xilinx ZynqMP IPI Controller |
27 Hardware | | IPI Agent | | IPI Buffers | |
32 | Xilinx IPI Agent Block |
41 - xlnx,zynqmp-ipi-mailbox
42 - xlnx,versal-ipi-mailbox
69 xlnx,ipi-id:
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| /Documentation/virt/kvm/ |
| D | vcpu-requests.rst | 49 order to perform some KVM maintenance. To do so, an IPI is sent, forcing
55 1) Send an IPI. This forces a guest mode exit.
70 as well as to avoid sending unnecessary IPIs (see "IPI Reduction"), and
71 even to ensure IPI acknowledgements are waited upon (see "Waiting for
160 then the caller will wait for each VCPU to acknowledge its IPI before
162 If, for example, the VCPU is sleeping, so no IPI is necessary, then
192 kick will send an IPI to force an exit from guest mode when necessary.
197 enter guest mode. This means that an optimized implementation (see "IPI
198 Reduction") must be certain when it's safe to not send the IPI. One
208 !kvm_request_pending() on its last check and then not receiving an IPI for
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| /Documentation/features/sched/membarrier-sync-core/ |
| D | arch-support.txt | 11 # when returning from IPI handler, and when returning to user-space.
31 # x86-32 uses IRET as return from interrupt, which takes care of the IPI.
35 # x86-64 uses IRET as return from interrupt, which takes care of the IPI.
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpic.txt | 71 non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC).
127 2 = MPIC inter-processor interrupt (IPI)
130 the MPIC IPI number. The type-specific
193 * MPIC IPI interrupts. Note the interrupt
196 ipi@410a0 {
197 compatible = "fsl,mpic-ipi";
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| /Documentation/admin-guide/hw-vuln/ |
| D | core-scheduling.rst | 112 Once a task has been selected for all the siblings in the core, an IPI is sent to
113 siblings for whom a new task was selected. Siblings on receiving the IPI will
130 When the highest priority task is selected to run, a reschedule-IPI is sent to
142 (victim) to enter idle mode. This is because the sending of the IPI would bring
145 which may not be worth protecting. It is also possible that the IPI is received
171 IPI processing delays
173 Core scheduling selects only trusted tasks to run together. IPI is used to notify
175 receiving of the IPI on some arch (on x86, this has not been observed). This may
177 IPI. Even though cache is flushed on entry to user mode, victim tasks on siblings
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| /Documentation/virt/kvm/loongarch/ |
| D | hypercalls.rst | 88 PV IPI on LoongArch includes both PV IPI multicast sending and PV IPI receiving,
89 and SWI is used for PV IPI inject since there is no VM-exits accessing SWI registers.
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| /Documentation/translations/zh_CN/arch/loongarch/ |
| D | irq-chip-model.rst | 26 在这种模型里面，IPI（Inter-Processor Interrupt）和CPU本地时钟中断直接发送到CPUINTC，
31 | IPI | --> | CPUINTC | <-- | Timer |
62 在这种模型里面，IPI（Inter-Processor Interrupt）和CPU本地时钟中断直接发送到CPUINTC，
67 | IPI | --> | CPUINTC | <-- | Timer |
93 在这种模型里面，IPI（Inter-Processor Interrupt）和CPU本地时钟中断直接发送到CPUINTC，
99 | IPI | --> | CPUINTC | <-- | Timer |
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| /Documentation/virt/kvm/devices/ |
| D | xics.rst | 50 * Pending IPI (inter-processor interrupt) priority, 8 bits
51 Zero is the highest priority, 255 means no IPI is pending.
54 Zero means no interrupt pending, 2 means an IPI is pending
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| D | xive.rst | 61 interrupt of the device being passed-through or the initial IPI ESB
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| /Documentation/devicetree/bindings/power/reset/ |
| D | xlnx,zynqmp-power.yaml | 34 xlnx,zynqmp-ipi-mailbox.txt for typical controller that
69 // Example with IPI mailbox method:
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| /Documentation/translations/zh_TW/arch/loongarch/ |
| D | irq-chip-model.rst | 26 在這種模型裏面，IPI（Inter-Processor Interrupt）和CPU本地時鐘中斷直接發送到CPUINTC，
31 | IPI | --> | CPUINTC | <-- | Timer |
62 在這種模型裏面，IPI（Inter-Processor Interrupt）和CPU本地時鐘中斷直接發送到CPUINTC，
67 | IPI | --> | CPUINTC | <-- | Timer |
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| /Documentation/arch/loongarch/ |
| D | irq-chip-model.rst | 22 In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
28 | IPI | --> | CPUINTC | <-- | Timer |
59 In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
65 | IPI | --> | CPUINTC | <-- | Timer |
91 In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
97 | IPI | --> | CPUINTC | <-- | Timer |
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| /Documentation/virt/ |
| D | guest-halt-polling.rst | 12 a remote vCPU to avoid sending an IPI (and the associated
13 cost of handling the IPI) when performing a wakeup.
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| /Documentation/RCU/Design/Expedited-Grace-Periods/ |
| D | Expedited-Grace-Periods.rst | 27 each of which results in an IPI to the target CPU.
48 The dotted arrows denote indirect action, for example, an IPI
55 ``smp_call_function_single()`` to send the CPU an IPI, which
96 | IPI the CPU to safely interact with the upcoming |
105 | IPI the CPU. |
128 that the CPU went idle while the IPI was in flight. If the CPU is idle,
142 grace periods. In addition, attempting to IPI offline CPUs will result
143 in splats, but failing to IPI online CPUs can result in too-short grace
231 For RCU-sched, there is an additional check: If the IPI has interrupted
235 For RCU-preempt, there is no specific check for idle in the IPI handler
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| D | ExpRCUFlow.svg | 494 id="tspan4776">Send IPI to CPU N</tspan></text>
577 id="tspan4776-5">IPI Handler</tspan></text>
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | apple,aic.yaml | 37 a "local" fast IPI register as opposed to using the "global" fast IPI
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| D | mti,gic.yaml | 53 mti,reserved-ipi-vectors:
116 mti,reserved-ipi-vectors = <40 8>;
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| /Documentation/virt/kvm/x86/ |
| D | hypercalls.rst | 166 :Purpose: Hypercall used to yield if the IPI target vCPU is preempted
170 :Usage example: When sending a call-function IPI-many to vCPUs, yield if
171 any of the IPI target vCPUs was preempted.
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| /Documentation/translations/zh_CN/virt/ |
| D | guest-halt-polling.rst | 25 IPI（以及处理IPI的相关成本）。
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| /Documentation/translations/zh_CN/core-api/ |
| D | local_ops.rst | 147 /* IPI called on each CPU. */
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| /Documentation/core-api/ |
| D | local_ops.rst | 153 /* IPI called on each CPU. */
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| D | this_cpu_ops.rst | 286 unless absolutely necessary. Please consider using an IPI to wake up
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| /Documentation/block/ |
| D | null_blk.rst | 57 1 Soft-irq. Uses IPI to complete IOs across CPU nodes. Simulates the overhead
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| /Documentation/timers/ |
| D | highres.rst | 160 global clock event devices. The support of such hardware would involve IPI
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| /Documentation/admin-guide/ |
| D | kernel-per-CPU-kthreads.rst | 161 CPU awakens, the scheduler will send an IPI that can result in
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