| /Documentation/driver-api/mei/ |
| D | iamt.rst | 3 Intel(R) Active Management Technology (Intel AMT)
6 Prominent usage of the Intel ME Interface is to communicate with Intel(R)
7 Active Management Technology (Intel AMT) implemented in firmware running on
8 the Intel ME.
10 Intel AMT provides the ability to manage a host remotely out-of-band (OOB)
14 Some examples of Intel AMT usage are:
25 Intel AMT (OOB) communication is based on SOAP (deprecated
29 For more information about Intel AMT:
30 https://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide/default.htm
33 Intel AMT Applications
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| D | mei.rst | 6 The Intel Management Engine (Intel ME) is an isolated and protected computing
7 resource (Co-processor) residing inside certain Intel chipsets. The Intel ME
9 The actual feature set depends on the Intel chipset SKU.
11 The Intel Management Engine Interface (Intel MEI, previously known as HECI)
12 is the interface between the Host and Intel ME. This interface is exposed
14 The Intel MEI Driver is in charge of the communication channel between
15 a host application and the Intel ME features.
17 Each Intel ME feature, or Intel ME Client is addressed by a unique GUID and
22 Intel MEI Driver
27 An application maintains communication with an Intel ME feature while
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| /Documentation/i2c/busses/ |
| D | i2c-i801.rst | 7 * Intel 82801AA and 82801AB (ICH and ICH0 - part of the
9 * Intel 82801BA (ICH2 - part of the '815E' chipset)
10 * Intel 82801CA/CAM (ICH3)
11 * Intel 82801DB (ICH4) (HW PEC supported)
12 * Intel 82801EB/ER (ICH5) (HW PEC supported)
13 * Intel 6300ESB
14 * Intel 82801FB/FR/FW/FRW (ICH6)
15 * Intel 82801G (ICH7)
16 * Intel 631xESB/632xESB (ESB2)
17 * Intel 82801H (ICH8)
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| /Documentation/hwmon/ |
| D | peci-dimmtemp.rst | 7 One of Intel server CPUs listed below which is connected to a PECI bus.
8 * Intel Xeon E5/E7 v3 server processors
9 Intel Xeon E5-14xx v3 family
10 Intel Xeon E5-24xx v3 family
11 Intel Xeon E5-16xx v3 family
12 Intel Xeon E5-26xx v3 family
13 Intel Xeon E5-46xx v3 family
14 Intel Xeon E7-48xx v3 family
15 Intel Xeon E7-88xx v3 family
16 * Intel Xeon E5/E7 v4 server processors
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| D | peci-cputemp.rst | 7 One of Intel server CPUs listed below which is connected to a PECI bus.
8 * Intel Xeon E5/E7 v3 server processors
9 Intel Xeon E5-14xx v3 family
10 Intel Xeon E5-24xx v3 family
11 Intel Xeon E5-16xx v3 family
12 Intel Xeon E5-26xx v3 family
13 Intel Xeon E5-46xx v3 family
14 Intel Xeon E7-48xx v3 family
15 Intel Xeon E7-88xx v3 family
16 * Intel Xeon E5/E7 v4 server processors
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| /Documentation/devicetree/bindings/dma/ |
| D | intel,ldma.yaml | 4 $id: http://devicetree.org/schemas/dma/intel,ldma.yaml#
10 - chuanhua.lei@intel.com
11 - mallikarjunax.reddy@intel.com
19 - intel,lgm-cdma
20 - intel,lgm-dma2tx
21 - intel,lgm-dma1rx
22 - intel,lgm-dma1tx
23 - intel,lgm-dma0tx
24 - intel,lgm-dma3
25 - intel,lgm-toe-dma30
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| /Documentation/devicetree/bindings/phy/ |
| D | intel,combo-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/intel,combo-phy.yaml#
7 title: Intel ComboPhy Subsystem
10 - Dilip Kota <eswara.kota@linux.intel.com>
13 Intel Combophy subsystem supports PHYs for PCIe, EMAC and SATA
22 - const: intel,combophy-lgm
23 - const: intel,combo-phy
48 intel,syscfg:
56 intel,hsio:
64 intel,aggregation:
69 intel,phy-mode:
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| D | intel,lgm-emmc-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
7 title: Intel Lightning Mountain(LGM) eMMC PHY
10 - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
13 Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
20 "intel,lgm-syscon", "syscon"
27 - intel,lgm-emmc-phy
28 - intel,keembay-emmc-phy
54 compatible = "intel,lgm-syscon", "syscon";
60 compatible = "intel,lgm-emmc-phy";
69 compatible = "intel,keembay-emmc-phy";
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| /Documentation/networking/device_drivers/ethernet/ |
| D | index.rst | 31 intel/e100
32 intel/e1000
33 intel/e1000e
34 intel/fm10k
35 intel/idpf
36 intel/igb
37 intel/igbvf
38 intel/ixgbe
39 intel/ixgbevf
40 intel/i40e
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | ixgbevf.rst | 4 Linux Base Virtual Function Driver for Intel(R) 10G Ethernet
7 Intel 10 Gigabit Virtual Function Linux driver.
8 Copyright(c) 1999-2018 Intel Corporation.
21 supplied with your Intel adapter. All hardware requirements listed apply to use
29 * Intel(R) Ethernet Controller 82598
30 * Intel(R) Ethernet Controller 82599
31 * Intel(R) Ethernet Controller X520
32 * Intel(R) Ethernet Controller X540
33 * Intel(R) Ethernet Controller x550
34 * Intel(R) Ethernet Controller X552
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| /Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 4 Intel(R) Speed Select Technology User Guide
7 The Intel(R) Speed Select Technology (Intel(R) SST) provides a powerful new
9 With Intel(R) SST, one server can be configured for power and performance for a
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
21 and configure these features is by using the Intel Speed Select utility.
23 This document explains how to use the Intel Speed Select tool to enumerate and
24 control Intel(R) SST features. This document gives example commands and explains
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
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| /Documentation/ABI/testing/ |
| D | sysfs-driver-intel-m10-bmc | 1 What: /sys/bus/.../drivers/intel-m10-bmc/.../bmc_version
4 Contact: Xu Yilun <yilun.xu@intel.com>
5 Description: Read only. Returns the hardware build version of Intel
9 What: /sys/bus/.../drivers/intel-m10-bmc/.../bmcfw_version
12 Contact: Xu Yilun <yilun.xu@intel.com>
13 Description: Read only. Returns the firmware version of Intel MAX10
17 What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_address
20 Contact: Peter Colberg <peter.colberg@intel.com>
23 that is managed by the Intel MAX10 BMC. It is stored in
28 What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_count
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| D | sysfs-driver-intel-xe-hwmon | 4 Contact: intel-xe@lists.freedesktop.org
13 Only supported for particular Intel Xe graphics platforms.
18 Contact: intel-xe@lists.freedesktop.org
21 Only supported for particular Intel Xe graphics platforms.
27 Contact: intel-xe@lists.freedesktop.org
30 Only supported for particular Intel Xe graphics platforms.
35 Contact: intel-xe@lists.freedesktop.org
39 Only supported for particular Intel Xe graphics platforms.
44 Contact: intel-xe@lists.freedesktop.org
53 Only supported for particular Intel Xe graphics platforms.
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| D | debugfs-intel-iommu | 1 What: /sys/kernel/debug/iommu/intel/iommu_regset
3 Contact: Jingqi Liu <Jingqi.liu@intel.com>
11 $ sudo cat /sys/kernel/debug/iommu/intel/iommu_regset
46 What: /sys/kernel/debug/iommu/intel/ir_translation_struct
48 Contact: Jingqi Liu <Jingqi.liu@intel.com>
57 $ sudo cat /sys/kernel/debug/iommu/intel/ir_translation_struct
79 What: /sys/kernel/debug/iommu/intel/dmar_translation_struct
81 Contact: Jingqi Liu <Jingqi.liu@intel.com>
83 This file dumps Intel IOMMU DMA remapping tables, such
93 $ sudo cat /sys/kernel/debug/iommu/intel/dmar_translation_struct
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| D | sysfs-driver-intel-i915-hwmon | 4 Contact: intel-gfx@lists.freedesktop.org
7 Only supported for particular Intel i915 graphics platforms.
12 Contact: intel-gfx@lists.freedesktop.org
21 Only supported for particular Intel i915 graphics platforms.
26 Contact: intel-gfx@lists.freedesktop.org
29 Only supported for particular Intel i915 graphics platforms.
34 Contact: intel-gfx@lists.freedesktop.org
38 Only supported for particular Intel i915 graphics platforms.
43 Contact: intel-gfx@lists.freedesktop.org
51 Only supported for particular Intel i915 graphics platforms.
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| D | sysfs-driver-intel-m10-bmc-sec-update | 1 What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash
4 Contact: Peter Colberg <peter.colberg@intel.com>
11 What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash
14 Contact: Peter Colberg <peter.colberg@intel.com>
21 What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash
24 Contact: Peter Colberg <peter.colberg@intel.com>
31 What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_canceled_csks
34 Contact: Peter Colberg <peter.colberg@intel.com>
39 What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_canceled_csks
42 Contact: Peter Colberg <peter.colberg@intel.com>
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| D | sysfs-class-usb_power_delivery | 3 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
9 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
16 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
25 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
39 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
53 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
67 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
74 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
83 Contact: Saranya Gopal <saranya.gopal@linux.intel.com>
92 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | intel,ixp4xx-expansion-bus-controller.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
7 title: Intel IXP4xx Expansion Bus Controller
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
24 - intel,ixp42x-expansion-bus-controller
25 - intel,ixp43x-expansion-bus-controller
26 - intel,ixp45x-expansion-bus-controller
27 - intel,ixp46x-expansion-bus-controller
59 $ref: /schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#
77 compatible = "intel,ixp42x-expansion-bus-controller", "syscon";
87 compatible = "intel,ixp4xx-flash", "cfi-flash";
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| D | intel,ixp4xx-expansion-peripheral-props.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#
7 title: Peripheral properties for Intel IXP4xx Expansion Bus
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
18 intel,ixp4xx-eb-t1:
23 intel,ixp4xx-eb-t2:
28 intel,ixp4xx-eb-t3:
33 intel,ixp4xx-eb-t4:
38 intel,ixp4xx-eb-t5:
43 intel,ixp4xx-eb-cycle-type:
45 chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles.
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| /Documentation/devicetree/bindings/net/ |
| D | intel,ixp4xx-hss.yaml | 5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
8 title: Intel IXP4xx V.35 WAN High Speed Serial Link (HSS)
14 The Intel IXP4xx HSS makes use of the IXP4xx NPE (Network
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
35 intel,queue-chl-rxtrig:
43 intel,queue-chl-txready:
51 intel,queue-pkt-rx:
59 intel,queue-pkt-tx:
68 intel,queue-pkt-rxfree:
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| /Documentation/devicetree/bindings/arm/ |
| D | intel,socfpga.yaml | 4 $id: http://devicetree.org/schemas/arm/intel,socfpga.yaml#
7 title: Intel SoCFPGA platform
20 - intel,n5x-socdk
21 - intel,socfpga-agilex-n6000
22 - intel,socfpga-agilex-socdk
23 - const: intel,socfpga-agilex
27 - intel,socfpga-agilex5-socdk
28 - const: intel,socfpga-agilex5
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| /Documentation/devicetree/bindings/firmware/ |
| D | intel,ixp4xx-network-processing-engine.yaml | 5 $id: http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#
8 title: Intel IXP4xx Network Processing Engine
25 - const: intel,ixp4xx-network-processing-engine
34 $ref: /schemas/crypto/intel,ixp4xx-crypto.yaml#
48 $ref: /schemas/net/intel,ixp4xx-hss.yaml#
65 compatible = "intel,ixp4xx-network-processing-engine";
71 compatible = "intel,ixp4xx-hss";
73 intel,npe-handle = <&npe 0>;
74 intel,queue-chl-rxtrig = <&qmgr 12>;
75 intel,queue-chl-txready = <&qmgr 34>;
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| /Documentation/power/powercap/ |
| D | powercap.rst | 15 example, the intel-rapl control type represents the Intel "Running Average
35 └──intel-rapl
36 ├──intel-rapl:0
43 │ ├──device -> ../../intel-rapl
45 │ ├──intel-rapl:0:0
52 │ │ ├──device -> ../../intel-rapl:0
62 │ ├──intel-rapl:0:1
69 │ │ ├──device -> ../../intel-rapl:0
89 ├──intel-rapl:1
96 │ ├──device -> ../../intel-rapl
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| /Documentation/admin-guide/media/ |
| D | ipu6-isys.rst | 6 Intel Image Processing Unit 6 (IPU6) Input System driver
9 Copyright |copy| 2023--2024 Intel Corporation
14 This file documents the Intel IPU6 (6th generation Image Processing Unit)
16 drivers/media/pci/intel/ipu6.
18 The Intel IPU6 can be found in certain Intel SoCs but not in all SKUs:
26 Intel IPU6 is made up of two components - Input System (ISYS) and Processing
32 There are 2 driver modules - intel-ipu6 and intel-ipu6-isys. intel-ipu6 is an
99 media-ctl -d $MDEV -l "\"ov01a10 3-0036\":0 -> \"Intel IPU6 CSI2 2\":0[1]"
103 media-ctl -d $MDEV -V "Intel IPU6 CSI2 2:0 [fmt:SBGGR10/1280x800]"
104 media-ctl -d $MDEV -V "Intel IPU6 CSI2 2:1 [fmt:SBGGR10/1280x800]"
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| /Documentation/devicetree/bindings/reset/ |
| D | intel,rcu-gw.yaml | 4 $id: http://devicetree.org/schemas/reset/intel,rcu-gw.yaml#
7 title: System Reset Controller on Intel Gateway SoCs
10 - Dilip Kota <eswara.kota@linux.intel.com>
15 - intel,rcu-lgm
16 - intel,rcu-xrx200
22 intel,global-reset:
45 - intel,global-reset
53 compatible = "intel,rcu-lgm";
55 intel,global-reset = <0x10 30>;
60 compatible = "intel,lgm-pwm";
|