Searched full:lapic (Results 1 – 5 of 5) sorted by relevance
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | intel,ce4100-lapic.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#
7 title: Intel Local Advanced Programmable Interrupt Controller (LAPIC)
15 architecture design, with a local component (LAPIC) integrated
17 (lapic) receives interrupts from the processor's interrupt pins,
22 Many of the Intel's generic devices like hpet, ioapic, lapic have
32 const: intel,ce4100-lapic
47 Virtual Wire Mode - use lapic as virtual wire interrupt delivery mode.
66 compatible = "intel,ce4100-lapic";
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| D | intel,ce4100-ioapic.yaml | 15 architecture design, with a local component (LAPIC) integrated
17 (lapic) receives interrupts from the processor's interrupt pins,
22 Many of the Intel's generic devices like hpet, ioapic, lapic have
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| /Documentation/arch/x86/x86_64/ |
| D | cpu-hotplug-spec.rst | 12 In ACPI each CPU needs an LAPIC object in the MADT table (5.2.11.5 in the
13 ACPI 3.0 specification). ACPI already has the concept of disabled LAPIC
14 objects by setting the Enabled bit in the LAPIC object to zero.
18 it should have its LAPIC Enabled bit set to 0. Linux will use the number
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| /Documentation/virt/kvm/ |
| D | api.rst | 5069 - HV_STIMER_DIRECT_MODE_AVAILABLE bit is only exposed with in-kernel LAPIC.
6902 it is still asserted. Vector is the LAPIC interrupt vector for which the
7546 for the IOAPIC pins. Whenever the LAPIC receives an EOI for these routes,
8060 KVM_X86_QUIRK_LAPIC_MMIO_HOLE By default, the MMIO LAPIC interface is
8063 disables the MMIO LAPIC interface if the
8064 LAPIC is in x2APIC mode.
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| /Documentation/admin-guide/ |
| D | kernel-parameters.txt | 2978 lapic [X86-32,APIC,EARLY] Enable the local APIC even if BIOS
2981 lapic= [X86,APIC] Do not use TSC deadline
2982 value for LAPIC timer one-shot implementation. Default
2983 back to the programmable timer unit in the LAPIC.
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