Searched full:lcdc (Results 1 – 17 of 17) sorted by relevance
| /Documentation/devicetree/bindings/display/ |
| D | atmel,lcdc.yaml | 4 $id: http://devicetree.org/schemas/display/atmel,lcdc.yaml#
7 title: Microchip's LCDC Framebuffer
14 The LCDC works with a framebuffer, which is a section of memory that contains
15 a complete frame of data representing pixel values for the display. The LCDC
22 - atmel,at91sam9261-lcdc
23 - atmel,at91sam9263-lcdc
24 - atmel,at91sam9g10-lcdc
25 - atmel,at91sam9g45-lcdc
26 - atmel,at91sam9g45es-lcdc
27 - atmel,at91sam9rl-lcdc
[all …]
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| D | renesas,shmobile-lcdc.yaml | 4 $id: http://devicetree.org/schemas/display/renesas,shmobile-lcdc.yaml#
7 title: Renesas SH-Mobile LCD Controller (LCDC)
16 - renesas,r8a7740-lcdc # R-Mobile A1
17 - renesas,sh73a0-lcdc # SH-Mobile AG5
85 const: renesas,r8a7740-lcdc
96 const: renesas,sh73a0-lcdc
110 compatible = "renesas,r8a7740-lcdc";
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| D | marvell,pxa2xx-lcdc.txt | 6 "marvell,pxa2xx-lcdc",
7 "marvell,pxa270-lcdc",
8 "marvell,pxa300-lcdc"
25 compatible = "marvell,pxa2xx-lcdc";
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| D | atmel,lcdc-display.yaml | 4 $id: http://devicetree.org/schemas/display/atmel,lcdc-display.yaml#
7 title: Microchip's LCDC Display
14 The LCD Controller (LCDC) consists of logic for transferring LCD image data
15 from an external display buffer to a TFT LCD panel. The LCDC has one display
18 LCDC is programmable on a per layer basis, and supports different LCD
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| /Documentation/devicetree/bindings/display/imx/ |
| D | fsl,imx-lcdc.yaml | 4 $id: http://devicetree.org/schemas/display/imx/fsl,imx-lcdc.yaml#
25 - const: fsl,imx25-lcdc
26 - const: fsl,imx21-lcdc
66 LCDC Sharp Configuration Register value.
74 - fsl,imx1-lcdc
75 - fsl,imx21-lcdc
104 lcdc@53fbc000 {
105 compatible = "fsl,imx25-lcdc", "fsl,imx21-lcdc";
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| /Documentation/devicetree/bindings/display/tilcdc/ |
| D | tilcdc.txt | 8 - reg: base address and size of the LCDC device
11 - ti,hwmods: Name of the hwmod associated to the LCDC
21 This property deals with the LCDC revision 2 (found on AM335x)
41 tfp410 DVI encoder or lcd panel to lcdc
58 ti,hwmods = "lcdc";
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| D | panel.txt | 5 - panel-info: configuration info to configure LCDC correctly for the panel
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| /Documentation/devicetree/bindings/display/msm/ |
| D | mdp4.yaml | 46 description: LCDC/LVDS
60 qcom,lcdc-align-lsb:
63 Indication that LSB alignment should be used for LCDC.
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| /Documentation/devicetree/bindings/pwm/ |
| D | atmel,hlcdc-pwm.yaml | 15 The LCDC integrates a Pulse Width Modulation (PWM) Controller. This block
20 values for PWM frequency. If the LCDC PWM frequency range does not match the
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| /Documentation/fb/ |
| D | sh7760fb.rst | 2 SH7760/SH7763 integrated LCDC Framebuffer driver
7 The SH7760/SH7763 have an integrated LCD Display controller (LCDC) which
48 The LCDC must explicitly be told about the type of LCD panel
126 .name = "sh7760-lcdc",
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| /Documentation/devicetree/bindings/display/atmel/ |
| D | atmel,hlcdc-display-controller.yaml | 15 The LCD Controller (LCDC) consists of logic for transferring LCD image
16 data from an external display buffer to a TFT LCD panel. The LCDC has one
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| /Documentation/devicetree/bindings/display/rockchip/ |
| D | rockchip,lvds.yaml | 53 const: lcdc
138 pinctrl-names = "lcdc";
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| /Documentation/devicetree/bindings/clock/ |
| D | lpc1850-cgu.txt | 124 lcdc: lcdc@40008000 {
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,msm8660-pinctrl.yaml | 74 hdmi, i2s, lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2,
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| /Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.yaml | 10 The EBI2 contains two peripheral blocks: XMEM and LCDC. The XMEM handles any
12 LCDC handles LCD displays.
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| /Documentation/devicetree/bindings/power/ |
| D | rockchip-io-domain.yaml | 192 lcdc-supply:
411 lcdc-supply = <&vcc33_lcd>;
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| /Documentation/devicetree/bindings/mfd/ |
| D | ams,as3711.yaml | 214 su2-dev = <&lcdc>;
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