Searched full:mfp (Results 1 – 6 of 6) sorted by relevance
| /Documentation/arch/arm/pxa/ |
| D | mfp.rst | 2 MFP Configuration for PXA2xx/PXA3xx Processors
7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
8 later PXA series processors. This document describes the existing MFP API,
14 Unlike the GPIO alternate function settings on PXA25x and PXA27x, a new MFP
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
19 the MFP logic and the remaining SoC peripherals::
28 | PWM2 |--(PWM_OUT)-------->| MFP |
48 to this new MFP mechanism, here are several key points:
54 see arch/arm/mach-pxa/mfp-pxa300.h)
63 3. Low power state for each pin is now controlled by MFP, this means the
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | mrvl,intc.yaml | 91 mrvl,clr-mfp-irq:
93 Specifies the interrupt that needs to clear MFP edge detection first.
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| /Documentation/arch/arm/ |
| D | index.rst | 49 pxa/mfp
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | iavf.rst | 152 + Multiple Functions per Port (MFP)
204 Center Bridging (DCB), Multiple Functions per Port (MFP), or Sideband Filters
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| D | i40e.rst | 112 device. The PF remains in limited promiscuous mode (unless it is in MFP mode)
527 per Port (MFP) and SR-IOV are enabled. An error from i40e is logged that says
709 Center Bridging (DCB), Multiple Functions per Port (MFP), or Sideband
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| /Documentation/arch/m68k/ |
| D | kernel-options.rst | 201 ST-MFP serial port ("Modem1"); parameters: 9600bps, 8N1
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