Searched full:mpsoc (Results 1 – 13 of 13) sorted by relevance
| /Documentation/devicetree/bindings/reset/ |
| D | xlnx,zynqmp-reset.yaml | 7 title: Zynq UltraScale+ MPSoC and Versal reset
14 The Zynq UltraScale+ MPSoC and Versal has several different resets.
25 For list of all valid reset indices for Zynq UltraScale+ MPSoC
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| /Documentation/devicetree/bindings/fpga/ |
| D | xlnx,zynqmp-pcap-fpga.yaml | 7 title: Xilinx Zynq Ultrascale MPSoC FPGA Manager
13 Device Tree Bindings for Zynq Ultrascale MPSoC FPGA Manager.
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| /Documentation/devicetree/bindings/nvmem/ |
| D | xlnx,zynqmp-nvmem.yaml | 7 title: Zynq UltraScale+ MPSoC Non Volatile Memory interface
10 The ZynqMP MPSoC provides access to the hardware related data
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| /Documentation/devicetree/bindings/rtc/ |
| D | xlnx,zynqmp-rtc.yaml | 7 title: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
10 RTC controller for the Xilinx Zynq MPSoC Real Time Clock.
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| /Documentation/driver-api/xilinx/ |
| D | eemi.rst | 2 Xilinx Zynq MPSoC EEMI Documentation
5 Xilinx Zynq MPSoC Firmware Interface
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-zynqmp-qspi.yaml | 7 title: Xilinx Zynq UltraScale+ MPSoC GQSPI controller
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| /Documentation/devicetree/bindings/serial/ |
| D | cdns,uart.yaml | 19 - description: UART controller for Zynq Ultrascale+ MPSoC
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| /Documentation/devicetree/bindings/firmware/xilinx/ |
| D | xlnx,zynqmp-firmware.yaml | 23 - description: For implementations complying for Zynq Ultrascale+ MPSoC.
67 description: The ZynqMP MPSoC provides access to the hardware related data
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| /Documentation/devicetree/bindings/power/reset/ |
| D | xlnx,zynqmp-power.yaml | 7 title: Xilinx Zynq MPSoC Power Management
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| /Documentation/devicetree/bindings/net/ |
| D | cdns,macb.yaml | 24 - cdns,zynqmp-gem # Xilinx Zynq Ultrascale+ MPSoC
32 - xlnx,zynqmp-gem # Xilinx Zynq Ultrascale+ MPSoC
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| /Documentation/devicetree/bindings/soc/xilinx/ |
| D | xilinx.yaml | 13 Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
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| /Documentation/devicetree/bindings/mailbox/ |
| D | xlnx,zynqmp-ipi-mailbox.yaml | 11 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI
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| /Documentation/devicetree/bindings/display/xlnx/ |
| D | xlnx,zynqmp-dpsub.yaml | 10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC)
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