Searched full:masked (Results 1 – 25 of 47) sorted by relevance
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| /Documentation/virt/kvm/devices/ |
| D | xics.rst | 82 * Masked flag, 1 bit
84 This bit is set to 1 if the interrupt is masked (cannot be delivered
86 call, or 0 if it is not masked.
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| D | s390_flic.rst | 79 to use, maskable whether this adapter may be masked (interrupts turned off),
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| /Documentation/admin-guide/perf/ |
| D | imx-ddr.rst | 40 - 0: corresponding bit is masked.
41 - 1: corresponding bit is not masked, i.e. used to do the matching.
44 When non-masked bits are matching corresponding AXI_ID bits then counter is
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| /Documentation/devicetree/bindings/mmc/ |
| D | sdhci-common.yaml | 26 Masked SDHCI capabilities to remove from SDHCI_CAPABILITIES and
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| /Documentation/filesystems/ |
| D | adfs.rst | 67 These are then masked by ownmask, eg 700 -> -rwx------
73 These are then masked by othmask, eg 077 -> ----rwxrwx
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| /Documentation/networking/ |
| D | napi.rst | 120 Drivers should keep the interrupts masked after scheduling
125 to IRQ being auto-masked by the device) should use the napi_schedule_prep()
223 permanently masked. This mode is enabled by using the ``SO_PREFER_BUSY_POLL``
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| /Documentation/core-api/ |
| D | genericirq.rst | 257 desc->status |= pending | masked;
263 if (desc->status & masked)
331 enabled and is masked in the flow handler when an interrupt event
335 is set, then the interrupt is masked at the hardware level and the
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | realtek,rtl-intc.yaml | 13 All connected input lines from SoC peripherals can be masked individually,
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| /Documentation/translations/zh_CN/core-api/ |
| D | genericirq.rst | 243 desc->status |= pending | masked;
249 if (desc->status & masked)
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| /Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra234-cbb.yaml | 34 then SError or Data abort exception error response is masked and an
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| D | nvidia,tegra194-cbb.yaml | 26 SError or Data Abort is masked and the error is reported with interrupt.
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| /Documentation/arch/powerpc/ |
| D | cpu_features.rst | 18 arch/powerpc/kernel/cputable.c. The PVR register is masked and compared with
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| D | dexcr.rst | 186 bits of both registers (corresponding to the non-userspace bits) are masked off.
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| /Documentation/devicetree/bindings/dma/ |
| D | st_fdma.txt | 51 -bit 2-0: Holdoff value, dreq will be masked for
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| /Documentation/hwmon/ |
| D | lm63.rst | 61 value have to be masked out. The value is still 16 bit in width.
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| D | adm1026.rst | 52 generated. The interrupts can be masked. In addition, there are over-temp
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| /Documentation/filesystems/spufs/ |
| D | spu_run.rst | 84 The bits masked with this value contain the code returned from
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| /Documentation/devicetree/bindings/pci/ |
| D | pci-iommu.txt | 95 * function bits masked out.
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| D | pci-msi.txt | 108 * the RID, masked to only the device and function bits.
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| /Documentation/trace/coresight/ |
| D | coresight-etm4x-reference.rst | 329 Error if attempt to set below minimum defined in IDR3, masked
415 comparators. Automatically clears masked bytes to 0 in CID
461 Automatically clears masked bytes to 0 in VMID value registers.
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| /Documentation/userspace-api/media/v4l/ |
| D | userp.rst | 110 lists may be time consuming. The delay can be masked by the depth of
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpic.txt | 53 configuration registers to a sane state-- masked or
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| /Documentation/PCI/ |
| D | boot-interrupts.rst | 66 needs to keep the interrupt line masked until the threaded handler has run.
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| /Documentation/netlink/specs/ |
| D | ovs_flow.yaml | 656 name: set-masked
664 non-masked value bits must be passed in as zeroes. Masking is not
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-coresight-devices-tpdm | 94 which needs to be masked.
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