Searched +full:master +full:- +full:level (Results 1 – 25 of 104) sorted by relevance
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| /Documentation/scsi/ |
| D | advansys.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
9 (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI
10 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
21 - ABP-480 - Bus-Master CardBus (16 CDB)
24 - ABP510/5150 - Bus-Master ISA (240 CDB)
25 - ABP5140 - Bus-Master ISA PnP (16 CDB)
26 - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
27 - ABP902/3902 - Bus-Master PCI (16 CDB)
28 - ABP3905 - Bus-Master PCI (16 CDB)
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| /Documentation/devicetree/bindings/fsi/ |
| D | fsi.txt | 4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
11 FSI masters may require their own DT nodes (to describe the master HW itself);
12 that requirement is defined by the master's implementation, and is described by
13 the fsi-master-* binding specifications.
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
22 fsi-slave@<link,id> {
26 fsi-slave-engine@<addr> {
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| /Documentation/w1/ |
| D | w1-generic.rst | 2 Introduction to the 1-wire (w1) subsystem
5 The 1-wire bus is a simple master-slave bus that communicates via a single
9 drain output and by sampling the logic level of the signal line.
14 All w1 slave devices must be connected to a w1 bus master device.
16 Example w1 master devices:
18 - DS9490 usb device
19 - W1-over-GPIO
20 - DS2482 (i2c to w1 bridge)
21 - Emulated devices, such as a RS232 converter, parallel port adapter, etc
25 ------------------------------
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,rpm-master-stats.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpm-master-stats.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. (QTI) RPM Master Stats
10 - Konrad Dybcio <konradybcio@kernel.org>
16 (particularly around entering hardware-driven low power modes: XO shutdown
17 and total system-wide power collapse) are first made at Master-level, and
20 The Master Stats provide a few useful bits that can be used to assess whether
21 our device has entered the desired low-power mode, how long it took to do so,
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| /Documentation/driver-api/soundwire/ |
| D | summary.rst | 10 SoundWire is a 2-pin multi-drop interface with data and clock line. It
12 Broad level key features of SoundWire interface include:
15 commands over a single two-pin interface.
23 (4) Device status monitoring, including interrupt-style alerts to the Master.
35 Below figure shows an example of connectivity between a SoundWire Master and
38 +---------------+ +---------------+
40 | Master |-------+-------------------------------| Slave |
42 | |-------|-------+-----------------------| |
43 +---------------+ | | +---------------+
47 +--+-------+--+
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| D | error_handling.rst | 13 1. Bus clash or parity errors: This mechanism relies on low-level detectors
20 impact its audibility (most-significant bits will be more impacted in PCM),
34 be applied. In case of a bad programming (command sent to non-existent
35 Slave or to a non-implemented register) or electrical issue, no response
36 signals the command was ignored. Some Master implementations allow for a
40 reset and re-enumerate all devices.
47 driver will return a -ETIMEOUT. Such timeouts are symptoms of a faulty
58 hard-reset might be the best solution.
62 that the Slave might behave in implementation-defined ways. The bus
64 or Master driver implementers are responsible for writing valid values in
|
| D | stream.rst | 24 -------------------------
26 -------------------------
28 Example 1: Stereo Stream with L and R channels is rendered from Master to
29 Slave. Both Master and Slave is using single port. ::
31 +---------------+ Clock Signal +---------------+
32 | Master +----------------------------------+ Slave |
36 | L + R +----------------------------------+ L + R |
38 +---------------+ +-----------------------> +---------------+
42 Master. Both Master and Slave is using single port. ::
45 +---------------+ Clock Signal +---------------+
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| /Documentation/devicetree/bindings/bus/ |
| D | brcm,gisb-arb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/brcm,gisb-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <f.fainelli@gmail.com>
15 - items:
16 - enum:
17 - brcm,bcm7445-gisb-arb # for other 28nm chips
18 - const: brcm,gisb-arb
19 - items:
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | max2175.txt | 2 -----------------------------------------
4 The MAX2175 IC is an advanced analog/digital hybrid-radio receiver with
5 RF to Bits® front-end designed for software-defined radio solutions.
8 --------------------
9 - compatible: "maxim,max2175" for MAX2175 RF-to-bits tuner.
10 - clocks: clock specifier.
11 - port: child port node corresponding to the I2S output, in accordance with
13 Documentation/devicetree/bindings/media/video-interfaces.txt. The port
17 --------------------
18 - maxim,master : phandle to the master tuner if it is a slave. This
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| /Documentation/devicetree/bindings/gpio/ |
| D | aspeed,sgpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
14 AST2600 have two sgpio master one with 128 pins another one with 80 pins,
15 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
17 - Support interrupt option for each input port and various interrupt
18 sensitivity option (level-high, level-low, edge-high, edge-low)
19 - Support reset tolerance option for each output port
20 - Directly connected to APB bus and its shift clock is from APB bus clock
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| /Documentation/driver-api/ |
| D | vme.rst | 5 -------------------
24 .. code-block:: c
30 if (vdev->id.num >= USER_BUS_MAX)
41 dev->bridge->num.
49 -------------------
53 succeeds, a non-zero value should be returned. A zero return value indicates
59 The driver can request ownership of one or more master windows
66 bus cycle types required in 'cycle'. Master windows add a further set of
73 transfers to be provided in the route attributes. This is typically VME-to-MEM
74 and/or MEM-to-VME, though some hardware can support VME-to-VME and MEM-to-MEM
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| /Documentation/devicetree/bindings/iommu/ |
| D | iommu.txt | 2 master(s).
13 Example: 32-bit DMA to 64-bit physical addresses
15 * Implement scatter-gather at page level granularity so that the device does
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
30 typically have a fixed association to the master device, whereas multiple-
31 master IOMMU devices can translate accesses from more than one master.
34 "dma-ranges" property that describes how the physical address space of the
35 IOMMU maps to memory. An empty "dma-ranges" property means that there is a
39 --------------------
40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an
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| D | apple,dart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sven Peter <sven@svenpeter.dev>
18 with individual pagetables and page-level read/write protection flags.
26 - apple,t8103-dart
27 - apple,t8103-usb4-dart
28 - apple,t8110-dart
29 - apple,t6000-dart
42 '#iommu-cells':
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | eeti.txt | 4 - compatible: should be "eeti,exc3000-i2c"
5 - reg: I2C address of the chip. Should be set to <0xa>
6 - interrupts: interrupt to which the chip is connected
9 - attn-gpios: A handle to a GPIO to check whether interrupt is still
11 support for level-triggered IRQs.
16 - touchscreen-inverted-x
17 - touchscreen-inverted-y
18 - touchscreen-swapped-x-y
22 i2c-master {
24 compatible = "eeti,exc3000-i2c";
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| /Documentation/i2c/ |
| D | slave-testunit-backend.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 by Wolfram Sang <wsa@sang-engineering.com> in 2020
11 easy to obtain). Examples include multi-master testing, and SMBus Host Notify
13 between master and slave mode because it needs to send data, too.
21 # echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device
30 compatible = "slave-testunit";
39 When writing, the device consists of 4 8-bit registers and, except for some
43 .. csv-table::
51 Using 'i2cset' from the i2c-tools package, the generic command looks like::
53 # i2cset -y <bus_num> <testunit_address> <CMD> <DATAL> <DATAH> <DELAY> i
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| /Documentation/security/keys/ |
| D | ecryptfs.rst | 20 'ecryptfs-utils'.
26 kernel and protected by the parent master key.
28 In order to avoid known-plaintext attacks, the datablob obtained through
38 kernel level.
42 keyctl add encrypted name "new ecryptfs key-type:master-key-name keylen" ring
44 keyctl update keyid "update key-type:master-key-name"
49 key-type:= 'trusted' | 'user'
72 $ mount -i -t ecryptfs -oecryptfs_sig=1000100010001000,\
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-timer-stm32 | 5 Reading returns the list possible master modes which are:
8 - "reset"
11 - "enable"
14 - "update"
16 For instance a master timer can then be used
18 - "compare_pulse"
21 - "OC1REF"
23 - "OC2REF"
25 - "OC3REF"
27 - "OC4REF"
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| D | configfs-stp-policy-p_sys-t | 1 What: /config/stp-policy/<device>:p_sys-t.<policy>/<node>/uuid
8 tagged with this UUID in the MIPI SyS-T packet stream, to
10 within the same master/channel range, and identify the
11 higher level decoders that may be needed for each source.
13 What: /config/stp-policy/<device>:p_sys-t.<policy>/<node>/do_len
17 Include payload length in the MIPI SyS-T header, boolean.
18 If enabled, the SyS-T protocol encoder will include payload
23 What: /config/stp-policy/<device>:p_sys-t.<policy>/<node>/ts_interval
28 MIPI SyS-T packet metadata, if this many milliseconds have
32 What: /config/stp-policy/<device>:p_sys-t.<policy>/<node>/clocksync_interval
|
| /Documentation/w1/slaves/ |
| D | w1_therm.rst | 16 -----------
43 to ``therm_bulk_read`` entry at w1_bus_master level. This will
49 -1 if at least one sensor still in conversion, 1 if conversion is complete
72 the sensor. Resolution is reset when the sensor gets power-cycled.
81 Some non-genuine DS18B20 chips are fixed in 12-bit mode only, so the actual
86 The write-only sysfs entry ``eeprom_cmd`` is an alternative for EEPROM operations.
94 Values shall be space separated and in the device range (typical -55 degC
97 be search at master level.
103 If so, it will activate the master's strong pullup.
106 be force-enabled.
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| /Documentation/devicetree/bindings/net/ |
| D | ti,dp83822.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Davis <afd@ti.com>
14 The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
16 data over standard, twisted-pair cables or to connect to an external,
17 fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
24 - $ref: ethernet-phy.yaml#
30 ti,link-loss-low:
39 ti,fiber-mode:
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| /Documentation/spi/ |
| D | spi-lm70llp.rst | 2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
15 -----------
19 This is a SPI master controller driver. It can be used in conjunction with
27 --------------------
28 The schematic for this particular board (the LM70EVAL-LLP) is
39 D0 2 - -
40 D1 3 --> V+ 5
41 D2 4 --> V+ 5
42 D3 5 --> V+ 5
43 D4 6 --> V+ 5
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| /Documentation/filesystems/ |
| D | fscrypt.rst | 2 Filesystem-level encryption (fscrypt)
11 Note: "fscrypt" in this document refers to the kernel-level portion,
14 covers the kernel-level portion. For command-line examples of how to
20 <https://source.android.com/security/encryption/file-based>`_, over
25 Unlike dm-crypt, fscrypt operates at the filesystem level rather than
26 at the block device level. This allows it to encrypt different files
28 filesystem. This is useful for multi-user systems where each user's
29 data-at-rest needs to be cryptographically isolated from the others.
34 directly into supported filesystems --- currently ext4, F2FS, UBIFS,
44 fscrypt does not support encrypting files in-place. Instead, it
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| /Documentation/devicetree/bindings/sound/ |
| D | simple-card.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
14 frame-master:
15 description: Indicates dai-link frame master.
18 bitclock-master:
19 description: Indicates dai-link bit clock master
22 frame-inversion:
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| D | mediatek,mt8188-mt6359.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-mt6359.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
13 - $ref: sound-card-common.yaml#
18 - mediatek,mt8188-es8326
19 - mediatek,mt8188-mt6359-evb
20 - mediatek,mt8188-nau8825
21 - mediatek,mt8188-rt5682s
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| /Documentation/driver-api/gpio/ |
| D | intro.rst | 17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
46 - Inputs can often be used as IRQ signals, often edge triggered but
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