Searched full:mib (Results 1 – 25 of 53) sorted by relevance
123
| /Documentation/translations/zh_CN/admin-guide/mm/damon/ |
| D | start.rst | 76 # x-axis: space (139728247021568-139728453431248: 196.848 MiB)
78 # resolution: 80x40 (2.461 MiB and 1.758 s for each character)
85 # avr: 107.708 MiB
87 10 95.328 MiB |**************************** |
88 20 95.332 MiB |**************************** |
89 30 95.340 MiB |**************************** |
90 40 95.387 MiB |**************************** |
91 50 95.387 MiB |**************************** |
92 60 95.398 MiB |**************************** |
93 70 95.398 MiB |**************************** |
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| /Documentation/translations/zh_TW/admin-guide/mm/damon/ |
| D | start.rst | 76 # x-axis: space (139728247021568-139728453431248: 196.848 MiB)
78 # resolution: 80x40 (2.461 MiB and 1.758 s for each character)
85 # avr: 107.708 MiB
87 10 95.328 MiB |**************************** |
88 20 95.332 MiB |**************************** |
89 30 95.340 MiB |**************************** |
90 40 95.387 MiB |**************************** |
91 50 95.387 MiB |**************************** |
92 60 95.398 MiB |**************************** |
93 70 95.398 MiB |**************************** |
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| /Documentation/admin-guide/mm/damon/ |
| D | start.rst | 46 0 addr [85.541 TiB , 85.541 TiB ) (57.707 MiB ) access 0 % age 10.400 s
47 1 addr [85.541 TiB , 85.542 TiB ) (413.285 MiB) access 0 % age 11.400 s
48 2 addr [127.649 TiB , 127.649 TiB) (57.500 MiB ) access 0 % age 1.600 s
49 3 addr [127.649 TiB , 127.649 TiB) (32.500 MiB ) access 0 % age 500 ms
50 4 addr [127.649 TiB , 127.649 TiB) (9.535 MiB ) access 100 % age 300 ms
52 6 addr [127.649 TiB , 127.649 TiB) (6.926 MiB ) access 0 % age 1 s
56 total size: 577.590 MiB
68 (``age XX``). For example, the fifth region of ~9 MiB size is being most
87 access two 100 MiB sized memory regions one by one. You can substitute this
114 # x-axis: space (139728247021568-139728453431248: 196.848 MiB)
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| /Documentation/driver-api/cxl/ |
| D | memory-devices.rst | 61 "pmem_size":"256.00 MiB (268.44 MB)",
62 "ram_size":"256.00 MiB (268.44 MB)",
73 "pmem_size":"256.00 MiB (268.44 MB)",
74 "ram_size":"256.00 MiB (268.44 MB)",
91 "pmem_size":"256.00 MiB (268.44 MB)",
92 "ram_size":"256.00 MiB (268.44 MB)",
103 "pmem_size":"256.00 MiB (268.44 MB)",
104 "ram_size":"256.00 MiB (268.44 MB)",
127 "pmem_size":"256.00 MiB (268.44 MB)",
128 "ram_size":"256.00 MiB (268.44 MB)",
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| /Documentation/filesystems/ext4/ |
| D | blocks.rst | 54 - 8MiB
55 - 32MiB
56 - 128MiB
116 - 8MiB
117 - 32MiB
118 - 128MiB
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| D | overview.rst | 12 will contain 32,768 blocks, for a length of 128MiB. The number of block
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| D | bigalloc.rst | 29 128MiB); however, the minimum allocation unit becomes a cluster, not a
|
| /Documentation/translations/zh_CN/virt/ |
| D | ne_overview.rst | 48 从主虚拟机中分割出来并给enclave的内存区域需要对齐2 MiB/1 GiB物理连续的内存
49 区域（或这个大小的倍数，如8 MiB）。该内存可以通过使用hugetlbfs从用户空间分
50 配[2][3]。一个enclave的内存大小需要至少64 MiB。enclave内存和CPU需要来自同
75 enclave镜像（EIF）被加载到enclave内存中，偏移量为8 MiB。enclave中的初始进程
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| /Documentation/filesystems/nfs/ |
| D | localio.rst | 43 4K read: IOPS=979k, BW=3825MiB/s (4011MB/s)(74.7GiB/20002msec)
44 4K write: IOPS=165k, BW=646MiB/s (678MB/s)(12.6GiB/20002msec)
46 128K write: IOPS=11.5k, BW=1433MiB/s (1503MB/s)(28.0GiB/20004msec)
49 4K read: IOPS=79.2k, BW=309MiB/s (324MB/s)(6188MiB/20003msec)
50 4K write: IOPS=59.8k, BW=234MiB/s (245MB/s)(4671MiB/20002msec)
51 128K read: IOPS=33.9k, BW=4234MiB/s (4440MB/s)(82.7GiB/20004msec)
52 128K write: IOPS=11.5k, BW=1434MiB/s (1504MB/s)(28.0GiB/20011msec)
56 4K read: IOPS=230k, BW=898MiB/s (941MB/s)(17.5GiB/20001msec)
57 4K write: IOPS=22.6k, BW=88.3MiB/s (92.6MB/s)(1766MiB/20001msec)
58 128K read: IOPS=38.8k, BW=4855MiB/s (5091MB/s)(94.8GiB/20001msec)
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| /Documentation/devicetree/bindings/pci/ |
| D | faraday,ftpci100.yaml | 21 The plain variant has 128MiB of non-prefetchable memory space, whereas the
22 "dual" variant has 64MiB. Take this into account when describing the ranges.
135 ranges = /* 1MiB I/O space 0x50000000-0x500fffff */
137 /* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
142 /* 128MiB at 0x00000000-0x07ffffff */
144 /* 64MiB at 0x00000000-0x03ffffff */
146 /* 64MiB at 0x00000000-0x03ffffff */
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| D | v3-v360epc-pci.txt | 44 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */
46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */
48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */
|
| /Documentation/gpu/ |
| D | panfrost.rst | 33 drm-total-memory: 290 MiB
34 drm-shared-memory: 0 MiB
35 drm-active-memory: 226 MiB
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| D | drm-usage-stats.rst | 143 - drm-memory-<region>: <uint> [KiB|MiB]
152 Default unit shall be bytes with optional unit specifiers of 'KiB' or 'MiB'
155 - drm-shared-<region>: <uint> [KiB|MiB]
160 - drm-total-<region>: <uint> [KiB|MiB]
164 - drm-resident-<region>: <uint> [KiB|MiB]
168 - drm-purgeable-<region>: <uint> [KiB|MiB]
172 - drm-active-<region>: <uint> [KiB|MiB]
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| /Documentation/virt/ |
| D | ne_overview.rst | 47 be aligned 2 MiB / 1 GiB physically contiguous memory regions (or multiple of
48 this size e.g. 8 MiB). The memory can be allocated e.g. by using hugetlbfs from
50 64 MiB. The enclave memory and CPUs need to be from the same NUMA node.
82 The enclave image (EIF) is loaded in the enclave memory at offset 8 MiB. The
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| /Documentation/admin-guide/ |
| D | ldm.rst | 13 1MiB journalled database at the end of the physical disk. The size of
39 Below we have a 50MiB disk, divided into seven partitions.
43 The missing 1MiB at the end of the disk is where the LDM database is
47 |Device || Offset Bytes | Sectors | MiB || Size Bytes | Sectors | MiB|
|
| /Documentation/devicetree/bindings/memory-controllers/ |
| D | mvebu-devbus.txt | 109 An example for an Armada XP GP board, with a 16 MiB NOR device as child
115 will start at base address 0xf0000000, with a size 0x1000000 (16 MiB)
157 /* 16 MiB */
164 * We split the 16 MiB in two partitions,
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| D | canaan,k210-sram.yaml | 10 The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB
|
| /Documentation/networking/ |
| D | smc-sysctl.rst | 49 only allowed 512KiB for SMC-R and 1MiB for SMC-D.
57 only allowed 512KiB for SMC-R and 1MiB for SMC-D.
|
| D | xfrm_proc.rst | 15 as part of the linux private MIB. These counters can be viewed in
|
| /Documentation/arch/arm/ |
| D | booting.rst | 142 A safe location is just above the 128MiB boundary from start of RAM.
158 be loaded just above the 128MiB boundary from the start of RAM as
175 kernel should be placed in the first 128MiB of RAM. It is recommended
176 that it is loaded above 32MiB in order to avoid the need to relocate
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| /Documentation/driver-api/mtd/ |
| D | spi-nor.rst | 117 size 8.00 MiB
140 c7 (8.00 MiB)
157 2097152 bytes (2.1 MB, 2.0 MiB) copied, 0.848566 s, 2.5 MB/s
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| /Documentation/ABI/testing/ |
| D | sysfs-firmware-turris-mox-rwtm | 28 Description: (Read) RAM size in MiB of this Turris Mox board as was detected
|
| /Documentation/staging/ |
| D | xz.rst | 48 which will use no BCJ filter and 1 MiB LZMA2 dictionary.
74 desktop systems while 64 KiB to 1 MiB might be more appropriate on
|
| /Documentation/devicetree/bindings/misc/ |
| D | ifm-csi.txt | 24 reg = <3 0 0x00100000>; /* CS 3, 1 MiB range */
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| /Documentation/core-api/ |
| D | swiotlb.rst | 143 default size of 64 MiB. The default pool size may be modified with the
212 (e.g., 4 MiB on a typical x86 system). Due to memory fragmentation, a max size
214 until it succeeds, but with a minimum size of 1 MiB. Given sufficient system
218 in the default pool. Because the new pool size is typically a few MiB at most,
220 of 4 MiB and the 256 KiB minimum area size, only 16 areas can be created. If
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