Home
last modified time | relevance | path

Searched full:opp (Results 1 – 25 of 105) sorted by relevance

12345

/Documentation/devicetree/bindings/interconnect/
Dmediatek,cci.yaml39 opp-table:
75 cci_opp: opp-table-cci {
77 opp-shared;
78 opp2_00: opp-273000000 {
79 opp-hz = /bits/ 64 <273000000>;
80 opp-microvolt = <650000>;
82 opp2_01: opp-338000000 {
83 opp-hz = /bits/ 64 <338000000>;
84 opp-microvolt = <687500>;
86 opp2_02: opp-403000000 {
[all …]
Dqcom,msm8998-bwmon.yaml62 opp-table:
119 cpu_bwmon_opp_table: opp-table {
121 opp-0 {
122 opp-peak-kBps = <4800000>;
124 opp-1 {
125 opp-peak-kBps = <9216000>;
127 opp-2 {
128 opp-peak-kBps = <15052800>;
130 opp-3 {
131 opp-peak-kBps = <20889600>;
[all …]
/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-mediatek.txt13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
38 opp-shared;
40 opp-598000000 {
41 opp-hz = /bits/ 64 <598000000>;
42 opp-microvolt = <1050000>;
45 opp-747500000 {
46 opp-hz = /bits/ 64 <747500000>;
47 opp-microvolt = <1050000>;
50 opp-1040000000 {
51 opp-hz = /bits/ 64 <1040000000>;
[all …]
Dcpufreq-st.txt5 from the SoC, then supplies the OPP framework with 'prop' and 'supported
16 - operating-points : [See: ../power/opp-v1.yaml]
38 - operating-points-v2 : [See ../power/opp-v2.yaml]
59 opp-supported-hw = <0x00000004 0xffffffff 0xffffffff>;
60 opp-hz = /bits/ 64 <1500000000>;
63 opp-microvolt-pcode0 = <1200000>;
64 opp-microvolt-pcode1 = <1200000>;
65 opp-microvolt-pcode2 = <1200000>;
66 opp-microvolt-pcode3 = <1200000>;
67 opp-microvolt-pcode4 = <1170000>;
[all …]
Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
25 opp-1000000000 {
26 opp-hz = /bits/ 64 <1000000000>;
28 opp-supported-hw = <0xf>, <0x3>;
31 opp-1300000000 {
32 opp-hz = /bits/ 64 <1300000000>;
33 opp-microvolt = <1000000>;
[all …]
Dqcom-cpufreq-nvmem.yaml17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level
18 according to the required OPPs defined in the CPU OPP tables.
20 For old implementation efuses are parsed to select the correct opp table and
45 '^opp-table(-[a-z0-9]+)?$':
54 $ref: /schemas/opp/opp-v2-kryo-cpu.yaml#
61 $ref: /schemas/opp/opp-v2-qcom-level.yaml#
95 '^opp-table(-[a-z0-9]+)?$':
102 '^opp-?[0-9]+$':
177 cpu_opp_table: opp-table-cpu {
179 opp-shared;
[all …]
Dnvidia,tegra20-cpufreq.txt7 - operating-points-v2: See ../bindings/opp/opp-v2.yaml for details.
10 For each opp entry in 'operating-points-v2' table:
11 - opp-supported-hw: Two bitfields indicating:
21 matches, the OPP gets enabled.
23 - opp-microvolt: CPU voltage triplet.
38 opp@456000000 {
40 opp-microvolt = <825000 825000 1125000>;
41 opp-supported-hw = <0x03 0x0001>;
42 opp-hz = /bits/ 64 <456000000>;
Dapple,cluster-cpufreq.yaml16 opp-level property specifying the hardware p-state index for that level.
70 ecluster_opp: opp-table-0 {
72 opp-shared;
75 opp-hz = /bits/ 64 <600000000>;
76 opp-level = <1>;
80 opp-hz = /bits/ 64 <972000000>;
81 opp-level = <2>;
86 pcluster_opp: opp-table-1 {
88 opp-shared;
91 opp-hz = /bits/ 64 <600000000>;
[all …]
/Documentation/devicetree/bindings/opp/
Dallwinner,sun50i-h6-operating-points.yaml4 $id: http://devicetree.org/schemas/opp/allwinner,sun50i-h6-operating-points.yaml#
7 title: Allwinner H6 CPU OPP
15 OPP varies based on the silicon variant in use. Allwinner Process
20 - $ref: opp-v2-base.yaml#
37 opp-shared: true
44 "^opp-[0-9]+$":
48 opp-hz: true
50 opp-microvolt: true
51 opp-supported-hw:
58 "^opp-microvolt-speed[0-9]$": true
[all …]
Dopp-v2.yaml4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
7 title: Generic OPP (Operating Performance Points)
13 - $ref: opp-v2-base.yaml#
54 cpu0_opp_table0: opp-table {
56 opp-shared;
58 opp-1000000000 {
59 opp-hz = /bits/ 64 <1000000000>;
60 opp-microvolt = <975000 970000 985000>;
61 opp-microamp = <70000>;
63 opp-suspend;
[all …]
Doperating-points-v2-ti-cpu.yaml4 $id: http://devicetree.org/schemas/opp/operating-points-v2-ti-cpu.yaml#
7 title: TI CPU OPP (Operating Performance Points)
12 OPP vary based on the silicon variant used. The data sheet sections
25 - $ref: opp-v2-base.yaml#
37 opp-shared: true
40 '^opp(-?[0-9]+)*$':
46 opp-hz: true
47 opp-microvolt: true
48 opp-supported-hw: true
49 opp-suspend: true
[all …]
Dopp-v2-base.yaml4 $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml#
7 title: Generic OPP (Operating Performance Points) Common Properties
25 pattern: '^opp-table(-[a-z0-9]+)?$'
27 opp-shared:
29 Indicates that device nodes using this OPP Table Node's phandle switch
32 lines, but they share OPP tables.
36 '^opp(-?[0-9]+)*$':
39 One or more OPP nodes describing voltage-current-frequency combinations.
41 OPP. These are mandatory except for the case where the OPP table is
42 present only to indicate dependency between devices using the opp-shared
[all …]
Dopp-v2-kryo-cpu.yaml4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
7 title: Qualcomm Technologies, Inc. NVMEM OPP
13 - $ref: opp-v2-base.yaml#
17 the CPU frequencies subset and voltage value of each OPP varies based on
23 the OPP framework with required information (existing HW bitmap).
24 This is used to determine the voltage and frequency value for each OPP of
25 operating-points-v2 table when it is parsed by the OPP framework.
40 opp-shared: true
43 '^opp-?[0-9]+$':
48 opp-hz: true
[all …]
Dopp-v2-qcom-level.yaml4 $id: http://devicetree.org/schemas/opp/opp-v2-qcom-level.yaml#
7 title: Qualcomm OPP
13 - $ref: opp-v2-base.yaml#
20 '^opp-?[0-9]+$':
25 opp-level: true
27 qcom,opp-fuse-level:
30 this OPP node. Sometimes several corners/levels shares a certain fuse
38 - opp-level
39 - qcom,opp-fuse-level
48 cpr_opp_table: opp-table-cpr {
[all …]
Dti,omap-opp-supply.yaml4 $id: http://devicetree.org/schemas/opp/ti,omap-opp-supply.yaml#
7 title: Texas Instruments OMAP compatible OPP supply
11 registers, which contain OPP-specific voltage information tailored
14 the primary regulator during an OPP transition.
18 w.r.t the vdd-supply and clk when making an OPP transition. By
19 supplying two regulators to the device that will undergo OPP
21 the OPP core to describe both regulators the platform needs. The
22 OPP core binding Documentation/devicetree/bindings/opp/opp-v2.yaml
31 pattern: '^opp-supply(@[0-9a-f]+)?$'
35 - description: Basic OPP supply controlling VDD and VBB
[all …]
/Documentation/power/
Dopp.rst2 Operating Performance Points (OPP) Library
10 2. Initial OPP List Registration
11 3. OPP Search Functions
12 4. OPP Availability Control Functions
13 5. OPP Data Retrieval Functions
19 1.1 What is an Operating Performance Point (OPP)?
48 OPP library provides a set of helper functions to organize and query the OPP
49 information. The library is located in drivers/opp/ directory and the header
50 is located in include/linux/pm_opp.h. OPP library can be enabled by enabling
52 Instrument's OMAP framework allows to optionally boot at a certain OPP without
[all …]
/Documentation/devicetree/bindings/power/
Dqcom,rpmpd.yaml72 opp-table:
85 // Example 1 (rpmh power domain controller and OPP table):
94 rpmhpd_opp_table: opp-table {
98 opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
102 opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
106 opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
110 opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
114 opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
118 opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
122 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
[all …]
Dpower_domain.txt54 - required-opps: This contains phandle to an OPP node in another device's OPP
56 OPP of a different device. It should not contain multiple phandles to the OPP
57 nodes in the same OPP table. This specifies the minimum required OPP of the
58 device(s), whose OPP's phandle is present in this property, for the
59 functioning of the current device at the current OPP (where this property is
63 - OPP table for domain provider that provides two domains.
65 domain0_opp_table: opp-table0 {
68 domain0_opp_0: opp-1000000000 {
69 opp-hz = /bits/ 64 <1000000000>;
70 opp-microvolt = <975000 970000 985000>;
[all …]
/Documentation/translations/zh_CN/power/
Dopp.rst4 :Original: Documentation/power/opp.rst
11 操作性能值（OPP）库
28 1.1 何为操作性能值（OPP）？
53 OPP库提供了一组辅助函数来组织和查询OPP信息。该库位于drivers/opp/目录下，其头文件
60 （SoC框架） -> 在必要的情况下，对某些OPP进行修改 -> OPP layer
64 OPP。这个链表的长度被期望是一个最优化的小数字，通常每个设备大约5个。初始链表包含了
109 pr_err("%s: unable to register mpu opp(%d)\n", r);
132 opp = dev_pm_opp_find_freq_exact(dev, 1000000000, false);
133 dev_pm_opp_put(opp);
135 if (IS_ERR(opp)) {
[all …]
/Documentation/devicetree/bindings/gpu/
Darm,mali-midgard.yaml82 opp-table:
169 gpu_opp_table: opp-table {
172 opp-533000000 {
173 opp-hz = /bits/ 64 <533000000>;
174 opp-microvolt = <1250000>;
176 opp-450000000 {
177 opp-hz = /bits/ 64 <450000000>;
178 opp-microvolt = <1150000>;
180 opp-400000000 {
181 opp-hz = /bits/ 64 <400000000>;
[all …]
Darm,mali-bifrost.yaml288 gpu_opp_table: opp-table {
291 opp-533000000 {
292 opp-hz = /bits/ 64 <533000000>;
293 opp-microvolt = <1250000>;
295 opp-450000000 {
296 opp-hz = /bits/ 64 <450000000>;
297 opp-microvolt = <1150000>;
299 opp-400000000 {
300 opp-hz = /bits/ 64 <400000000>;
301 opp-microvolt = <1125000>;
[all …]
/Documentation/driver-api/thermal/
Dcpu-idle-cooling.rst25 because of the OPP density, we can only choose an OPP with a power
27 losing performance. In other words, one OPP under-utilizes the CPU
28 with a power less than the requested power budget and the next OPP
29 exceeds the power budget. An intermediate OPP could have been used if
41 The Operating Performance Point (OPP) density has a great influence on
43 plethora of OPP density, and some have large power gap between OPPs,
47 At a specific OPP, we can assume that injecting idle cycle on all CPUs
52 relation with the OPP’s sustainable power and can be computed with a
55 Power(IdleCycle) = Coef x Power(OPP)
151 because we don’t want to change the OPP. We can group the
[all …]
/Documentation/devicetree/bindings/display/msm/
Dqcom,x1e80100-mdss.yaml146 mdp_opp_table: opp-table {
149 opp-200000000 {
150 opp-hz = /bits/ 64 <200000000>;
154 opp-325000000 {
155 opp-hz = /bits/ 64 <325000000>;
159 opp-375000000 {
160 opp-hz = /bits/ 64 <375000000>;
164 opp-514000000 {
165 opp-hz = /bits/ 64 <514000000>;
226 mdss_dp0_opp_table: opp-table {
[all …]
Dqcom,sm7150-mdss.yaml185 mdp_opp_table: opp-table {
188 opp-19200000 {
189 opp-hz = /bits/ 64 <19200000>;
193 opp-200000000 {
194 opp-hz = /bits/ 64 <200000000>;
198 opp-300000000 {
199 opp-hz = /bits/ 64 <300000000>;
203 opp-344000000 {
204 opp-hz = /bits/ 64 <344000000>;
208 opp-430000000 {
[all …]
Dqcom,sm7150-dpu.yaml114 mdp_opp_table: opp-table {
117 opp-19200000 {
118 opp-hz = /bits/ 64 <19200000>;
122 opp-200000000 {
123 opp-hz = /bits/ 64 <200000000>;
127 opp-300000000 {
128 opp-hz = /bits/ 64 <300000000>;
132 opp-344000000 {
133 opp-hz = /bits/ 64 <344000000>;
137 opp-430000000 {
[all …]

12345