Searched full:on (Results 1 – 25 of 3847) sorted by relevance
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| /Documentation/devicetree/bindings/timer/ |
| D | renesas,cmt.yaml | 28 - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1
29 - renesas,r8a7740-cmt1 # 48-bit CMT1 on R-Mobile A1
30 - renesas,r8a7740-cmt2 # 32-bit CMT2 on R-Mobile A1
31 - renesas,r8a7740-cmt3 # 32-bit CMT3 on R-Mobile A1
32 - renesas,r8a7740-cmt4 # 32-bit CMT4 on R-Mobile A1
33 - renesas,sh73a0-cmt0 # 32-bit CMT0 on SH-Mobile AG5
34 - renesas,sh73a0-cmt1 # 48-bit CMT1 on SH-Mobile AG5
35 - renesas,sh73a0-cmt2 # 32-bit CMT2 on SH-Mobile AG5
36 - renesas,sh73a0-cmt3 # 32-bit CMT3 on SH-Mobile AG5
37 - renesas,sh73a0-cmt4 # 32-bit CMT4 on SH-Mobile AG5
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| /Documentation/devicetree/bindings/regulator/ |
| D | tps65090.txt | 54 regulator-boot-on;
55 regulator-always-on;
62 regulator-boot-on;
63 regulator-always-on;
68 regulator-boot-on;
69 regulator-always-on;
74 regulator-boot-on;
75 regulator-always-on;
80 regulator-boot-on;
81 regulator-always-on;
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| D | tps65217.txt | 15 - ti,pmic-shutdown-controller: Telling the PMIC to shutdown on PWR_EN toggle.
32 regulator-boot-on;
33 regulator-always-on;
39 regulator-boot-on;
40 regulator-always-on;
46 regulator-boot-on;
47 regulator-always-on;
53 regulator-boot-on;
54 regulator-always-on;
60 regulator-boot-on;
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| D | nxp,pf8x00-regulator.yaml | 105 regulator-always-on;
106 regulator-boot-on;
112 regulator-always-on;
113 regulator-boot-on;
119 regulator-always-on;
120 regulator-boot-on;
126 regulator-always-on;
127 regulator-boot-on;
134 regulator-always-on;
135 regulator-boot-on;
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| D | ltc3589.txt | 16 Required properties (not on ldo3, ldo4):
24 regulator is fixed to 1.8 V on LTC3589 and to 2.8 V on LTC3589-1,2. The ldo4
25 regulator can output between 1.8 V and 3.3 V on LTC3589 and between 1.2 V
26 and 3.2 V on LTC3589-1,2 in four steps. The ldo1 standby regulator can not
27 be disabled and thus should have the regulator-always-on property set.
41 regulator-boot-on;
42 regulator-always-on;
50 regulator-boot-on;
51 regulator-always-on;
59 regulator-boot-on;
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| D | pfuze100.yaml | 47 (e.g. DDR ref, DDR supply) has set the "regulator-always-on" property.
48 If not present, the switched regulators are always on and can't be
50 with old dtb's which rely on the fact that the switched regulators are
51 always on and don't mark them explicit as "regulator-always-on".
59 IC (PMIC) on PMIC_STBY_REQ signal.
110 regulator-boot-on;
111 regulator-always-on;
118 regulator-boot-on;
119 regulator-always-on;
125 regulator-boot-on;
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| D | mt6380-regulator.txt | 25 regulator-always-on;
26 regulator-boot-on;
41 regulator-always-on;
42 regulator-boot-on;
50 regulator-always-on;
51 regulator-boot-on;
59 regulator-always-on;
60 regulator-boot-on;
68 regulator-always-on;
69 regulator-boot-on;
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| D | nxp,pca9450-regulator.yaml | 23 # Note: Buck3 removed on PCA9450B and connect with Buck1 on PCA9450C.
122 regulator-boot-on;
123 regulator-always-on;
130 regulator-boot-on;
131 regulator-always-on;
140 regulator-boot-on;
141 regulator-always-on;
147 regulator-boot-on;
148 regulator-always-on;
154 regulator-boot-on;
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| D | ltc3676.txt | 16 Required properties (not on ldo3):
26 regulator can not be disabled and thus should have the regulator-always-on
41 regulator-boot-on;
42 regulator-always-on;
50 regulator-boot-on;
51 regulator-always-on;
59 regulator-boot-on;
60 regulator-always-on;
68 regulator-boot-on;
69 regulator-always-on;
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| D | tps65218.txt | 31 regulator-boot-on;
32 regulator-always-on;
39 regulator-boot-on;
40 regulator-always-on;
47 regulator-boot-on;
48 regulator-always-on;
55 regulator-boot-on;
56 regulator-always-on;
63 regulator-boot-on;
64 regulator-always-on;
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| D | richtek,rtq2208.yaml | 46 vout register selection based on this boolean value.
109 regulator-always-on;
111 regulator-on-in-suspend;
119 regulator-always-on;
121 regulator-on-in-suspend;
129 regulator-always-on;
131 regulator-on-in-suspend;
139 regulator-always-on;
141 regulator-on-in-suspend;
149 regulator-always-on;
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| /Documentation/ABI/testing/ |
| D | sysfs-devices-mapping | 9 For example, on 4-die Xeon platform with up to 6 IIO stacks per
31 IIO PMU 0 on die 0 belongs to PCI RP on bus 0x00, domain 0x0000
32 IIO PMU 0 on die 1 belongs to PCI RP on bus 0x40, domain 0x0000
33 IIO PMU 0 on die 2 belongs to PCI RP on bus 0x80, domain 0x0000
34 IIO PMU 0 on die 3 belongs to PCI RP on bus 0xc0, domain 0x0000
41 value that means UPI link number X on die Y is connected to UPI
42 link Z on die W and this link between sockets can be monitored
59 UPI link 0 on die 0 is connected to UPI link 1 on die 1
60 UPI link 0 on die 1 is connected to UPI link 0 on die 3
61 UPI link 0 on die 2 is connected to UPI link 1 on die 3
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| D | sysfs-class-led-trigger-tty | 12 Signal reception (rx) of data on the named tty device.
13 If set to 0, the LED will not blink on reception.
14 If set to 1 (default), the LED will blink on reception.
20 Signal transmission (tx) of data on the named tty device.
21 If set to 0, the LED will not blink on transmission.
22 If set to 1 (default), the LED will blink on transmission.
30 If the line state is detected, the LED is switched on.
40 If the line state is detected, the LED is switched on.
50 If the line state is detected, the LED is switched on.
59 DCE has detected an incoming ring signal on the telephone
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| /Documentation/devicetree/bindings/mfd/ |
| D | rockchip,rk806.yaml | 160 regulator-always-on;
161 regulator-boot-on;
172 regulator-always-on;
173 regulator-boot-on;
184 regulator-always-on;
185 regulator-boot-on;
191 regulator-on-in-suspend;
197 regulator-always-on;
198 regulator-boot-on;
209 regulator-always-on;
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| D | rockchip,rk818.yaml | 151 regulator-always-on;
152 regulator-boot-on;
162 regulator-always-on;
163 regulator-boot-on;
167 regulator-on-in-suspend;
174 regulator-always-on;
175 regulator-boot-on;
177 regulator-on-in-suspend;
183 regulator-always-on;
184 regulator-boot-on;
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| D | rockchip,rk808.yaml | 155 regulator-always-on;
156 regulator-boot-on;
163 regulator-always-on;
164 regulator-boot-on;
171 regulator-always-on;
172 regulator-boot-on;
177 regulator-always-on;
178 regulator-boot-on;
185 regulator-always-on;
186 regulator-boot-on;
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| D | rockchip,rk805.yaml | 145 regulator-always-on;
146 regulator-boot-on;
148 regulator-on-in-suspend;
157 regulator-always-on;
158 regulator-boot-on;
160 regulator-on-in-suspend;
167 regulator-always-on;
168 regulator-boot-on;
170 regulator-on-in-suspend;
178 regulator-always-on;
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| /Documentation/i2c/ |
| D | i2c-address-translators.rst | 16 with a modified slave address. The address used on the parent bus is
22 - the address on the parent and child busses can be different
23 - there is normally no need to select the child port; the alias used on the
29 The ATR creates a new I2C "child" adapter on each child bus. Adding
30 devices on the child bus ends up in invoking the driver code to select
34 all I2C transactions directed to devices on the child buses.
51 each other. The ATR receives the transactions initiated on bus A and
52 propagates them on bus B or bus C or none depending on the device address
53 in the transaction and based on the alias table.
68 - Slave X driver requests a transaction (on adapter B), slave address 0x10
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| /Documentation/admin-guide/ |
| D | numastat.rst | 11 is incremented on the preferred node, otherwise numa_foreign is incremented on
12 the preferred node and numa_miss on the node where allocation succeeded.
16 counters based on CPU local node. local_node is similar to numa_hit and is
17 incremented on allocation from a node by CPU on the same node. other_node is
18 similar to numa_miss and is incremented on the node where allocation succeeds
31 numa_foreign A process wanted to allocate on this node,
34 local_node A process ran on this node's CPU,
37 other_node A process ran on a different node's CPU
46 well right now on machines with a small number of CPUs.
48 Note that on systems with memoryless nodes (where a node has CPUs but no
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| /Documentation/kbuild/ |
| D | Kconfig.recursion-issue-02 | 8 # The recursive limitations with Kconfig has some non intuitive implications on
12 # annotate those requirements, ie, some drivers use "depends on" while others
14 # core requirement, and one uses "select" while the other uses "depends on" to
18 # A perhaps not so obvious implication of this is that, if semantics on these
20 # they select or depend on end up becoming shared requirements which cannot be
31 # due to the disjoint use of semantics on expressing each bell's relationship
32 # with CORE, one uses "depends on" while the other uses "select". Another
35 # as mandatory required symbols. For more details on the heavy handed nature
38 # To fix this the "depends on CORE" must be changed to "select CORE", or the
39 # "select CORE" must be changed to "depends on CORE".
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| /Documentation/devicetree/bindings/pci/ |
| D | v3-v360epc-pci.txt | 13 as routed on the system.
28 on the Integrator, some registers in the syscon are required to
56 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
57 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
58 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
59 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
61 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
62 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
63 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
64 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
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| /Documentation/networking/device_drivers/ethernet/mellanox/mlx5/ |
| D | counters.rst | 21 There are several counter groups based on where the counter is being counted. In
24 These counter groups are based on which component in a networking setup,
80 with NIC, link, or network. This measuring point holds information on
127 These counters provide information on the amount of traffic that was accelerated
145 - The number of packets received on ring i.
149 - The number of bytes received on ring i.
153 - The number of packets transmitted on ring i.
157 - The number of bytes transmitted on ring i.
165 - Number of CQEs events on SQ issued on ring i.
169 - The number of error CQEs encountered on the SQ for ring i.
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| /Documentation/driver-api/surface_aggregator/ |
| D | overview.rst | 8 embedded controller (EC) on Microsoft Surface devices. It has been originally
9 introduced on 4th generation devices (Surface Pro 4, Surface Book 1), but
17 Not much is currently known about SAM on 4th generation devices (Surface Pro
19 between host and EC (as detailed below). On 5th (Surface Pro 2017, Surface
24 host. On the Surface Book 2, specifically, it additionally provides an
26 display part from the keyboard part of the device), on the Surface Laptop 1
28 restructured for 7th generation devices and on those, specifically Surface
32 While features have not changed much on a coarse level since the 5th
33 generation, internal interfaces have undergone some rather large changes. On
37 requests. On 7th generation devices, this additional layer is gone and these
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| /Documentation/virt/kvm/x86/ |
| D | amd-memory-encryption.rst | 10 Secure Encrypted Virtualization (SEV) is a feature found on AMD processors.
52 The main ioctl to access SEV is KVM_MEMORY_ENCRYPT_OP, which operates on
55 (on some older versions of Linux, the ioctl tries to run normally even
70 should point to a file descriptor that is opened on the ``/dev/sev``
73 On output, ``error`` is zero on success, or an error code. Error codes
91 Returns: 0 on success, -negative on error
126 might set the debug swap VMSA feature (bit 5) depending on the value of the
138 Returns: 0 on success, -negative on error
153 On success, the 'handle' field contains a new handle and on error, a negative value.
169 Returns: 0 on success, -negative on error
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| /Documentation/locking/ |
| D | robust-futex-ABI.rst | 9 futexes, for kernel assist of cleanup of held locks on task exit.
11 The interesting data as to what futexes a thread is holding is kept on a
25 threads in the kernel. Options on the sys_futex(2) system call support
26 waiting on a particular futex, and waking up the next waiter on a
32 to do so, then improperly listed locks will not be cleaned up on exit,
34 waiting on the same locks.
43 consisting of three words. Each word is 32 bits on 32 bit arch's, or 64
44 bits on 64 bit arch's, and local byte order. Each thread should have
47 If a thread is running in 32 bit compatibility mode on a 64 native arch
51 compatibility mode, will attempt to process both lists on each task
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