Searched full:p0 (Results 1 – 25 of 40) sorted by relevance
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| /Documentation/devicetree/bindings/ata/ |
| D | ceva,ahci-1v84.yaml | 41 ceva,p0-cominit-params: 46 ceva,p0-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>; 53 ceva,p0-comwake-params: 58 ceva,p0-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>; 65 ceva,p0-burst-params: 70 ceva,p0-burst-params = /bits/ 8 <BMX BNM SFD PTST>; 77 ceva,p0-retry-params: 82 ceva,p0-retry-params = /bits/ 16 <RIT RCT>; 153 - ceva,p0-cominit-params 154 - ceva,p0-comwake-params [all …]
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| /Documentation/scheduler/ |
| D | sched-util-clamp.rst | 199 +- p0 +- p3 +- p4 279 p0->uclamp[UCLAMP_MIN] = 300 280 p0->uclamp[UCLAMP_MAX] = 900 285 then assuming both p0 and p1 are enqueued to the same rq, both UCLAMP_MIN 404 p0->uclamp[UCLAMP_MIN] = // system default; 405 p0->uclamp[UCLAMP_MAX] = // system default; 416 when p0 and p1 are attached to cgroup0, the values become: 420 p0->uclamp[UCLAMP_MIN] = cgroup0->cpu.uclamp.min = 20% * 1024; 421 p0->uclamp[UCLAMP_MAX] = cgroup0->cpu.uclamp.max = 60% * 1024; 426 when p0 and p1 are attached to cgroup1, these instead become: [all …]
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| D | schedutil.rst | 65 f_cur := ----- * P0 70 P0; otherwise
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| /Documentation/devicetree/bindings/phy/ |
| D | airoha,en7581-pcie-phy.yaml | 33 - const: p0-xr-dtime 66 "p0-xr-dtime", "p1-xr-dtime",
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| /Documentation/litmus-tests/atomic/ |
| D | Atomic-RMW-ops-are-atomic-WRT-atomic_set.litmus | 14 P0(atomic_t *v)
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| D | cmpxchg-fail-ordered-2.litmus | 12 P0(int *x, int *y)
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| D | Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus | 14 P0(int *x, atomic_t *y)
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| D | cmpxchg-fail-unordered-2.litmus | 13 P0(int *x, int *y)
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| D | cmpxchg-fail-ordered-1.litmus | 12 P0(int *x, int *y, int *z)
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| D | cmpxchg-fail-unordered-1.litmus | 13 P0(int *x, int *y, int *z)
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| /Documentation/translations/zh_CN/scheduler/ |
| D | schedutil.rst | 65 f_cur := ----- * P0 70 P0; 其它情况
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,armada-375-pinctrl.txt | 40 mpp24 24 gpio, led(p0), ge1(rxd0), sd(cmd), uart0(rts) 62 mpp46 46 gpio, led(p0), ge0(txd0), ge1(txd0), dev(we1) 77 mpp61 61 gpio, i2c1(sda), uart1(rxd), spi1(cs2), led(p0)
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| /Documentation/arch/x86/ |
| D | resctrl.rst | 884 # mkdir p0 p1 885 # echo "L3:0=3;1=c\nMB:0=50;1=50" > /sys/fs/resctrl/p0/schemata 891 Tasks that are under the control of group "p0" may only allocate from the 895 Similarly, tasks that are under the control of group "p0" may use a 907 # echo "L3:0=3;1=c\nMB:0=1024;1=500" > /sys/fs/resctrl/p0/schemata 910 In the above example the tasks in "p1" and "p0" on socket 0 would use a max b/w 936 # mkdir p0 937 # echo "L3:0=f8000;1=fffff" > p0/schemata 945 # echo 1234 > p0/tasks 962 # echo -e "L3:0=f8000;1=fffff\nMB:0=20;1=100" > p0/schemata [all …]
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| /Documentation/litmus-tests/locking/ |
| D | RM-broken.litmus | 16 P0(int *x, atomic_t *y, spinlock_t *lck)
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| D | RM-fixed.litmus | 16 P0(int *x, atomic_t *y, spinlock_t *lck)
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| D | DCL-broken.litmus | 15 P0(int *flag, int *data, spinlock_t *lck)
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| D | DCL-fixed.litmus | 16 P0(int *flag, int *data, spinlock_t *lck)
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| /Documentation/litmus-tests/rcu/ |
| D | RCU+sync+read.litmus | 19 P0(int *x, int *y)
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| D | RCU+sync+free.litmus | 24 P0(int *x, int *z, int **y)
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| /Documentation/devicetree/bindings/gpio/ |
| D | nxp,lpc3220-gpio.yaml | 25 0: GPIO P0
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| /Documentation/devicetree/bindings/soc/imx/ |
| D | fsl,imx-anatop.yaml | 46 "regulator-((1p1)|(2p5)|(3p0)|(vddcore)|(vddpu)|(vddsoc))$": 70 reg_3p0: regulator-3p0 {
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| /Documentation/ |
| D | atomic_t.txt | 97 P0(atomic_t *v) 241 P0(int *x, atomic_t *y) 263 P0 P1
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| /Documentation/devicetree/bindings/nvmem/ |
| D | mediatek,efuse.yaml | 86 u2_intr_p0: usb2-intr-p0@188,1 {
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| /Documentation/input/devices/ |
| D | elantech.rst | 470 p3 p1 p2 p0 y11 y10 y9 y8 472 p7..p0 = pressure (not EF113) 603 p3 p1 p2 p0 y11 y10 y9 y8 605 p7..p0 = pressure 728 p3 p1 p2 p0 y11 y10 y9 y8 730 p7..p0 = pressure
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| /Documentation/litmus-tests/ |
| D | README | 66 The counterpart to RM-broken.litmus, showing P0()'s two loads from
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