Searched full:pcc2 (Results 1 – 9 of 9) sorted by relevance
| /Documentation/devicetree/bindings/pwm/ |
| D | imx-tpm-pwm.yaml | 55 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
57 clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
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| /Documentation/devicetree/bindings/clock/ |
| D | imx7ulp-pcc-clock.yaml | 24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
40 - fsl,imx7ulp-pcc2
92 compatible = "fsl,imx7ulp-pcc2";
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| D | imx7ulp-scg-clock.yaml | 24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
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| /Documentation/devicetree/bindings/watchdog/ |
| D | fsl-imx7ulp-wdt.yaml | 57 clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
58 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
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| /Documentation/devicetree/bindings/timer/ |
| D | nxp,tpm-timer.yaml | 63 <&pcc2 IMX7ULP_CLK_LPTPM5>;
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| /Documentation/devicetree/bindings/dma/ |
| D | fsl,edma.yaml | 274 clocks = <&pcc2 IMX7ULP_CLK_DMA1>, <&pcc2 IMX7ULP_CLK_DMA_MUX1>;
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | nvidia,tegra114-pinmux.yaml | 61 pbb7, pcc2, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7, kb_row0_pr0,
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| D | nvidia,tegra30-pinmux.yaml | 89 pbb7, cam_mclk_pcc0, pcc1, pcc2, sdmmc4_rst_n_pcc3,
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| D | nvidia,tegra124-pinmux.yaml | 66 pbb7, pcc2, jtag_rtck, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7,
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