Searched full:pdc (Results 1 – 25 of 29) sorted by relevance
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | qcom,pdc.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#
7 title: PDC interrupt controller
14 Power Domain Controller (PDC) that is on always-on domain. In addition to
20 controller PDC is next in hierarchy, followed by others. Drivers requiring
21 wakeup capabilities of their device interrupts routed through the PDC, must
22 specify PDC as their interrupt controller and request the PDC port associated
29 - qcom,qdu1000-pdc
30 - qcom,sa8255p-pdc
31 - qcom,sa8775p-pdc
32 - qcom,sc7180-pdc
[all …]
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| D | img,pdc-intc.txt | 1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
4 representation of a PDC IRQ controller. This has a number of input interrupt
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
52 * TZ1090 PDC block
54 pdc: pdc@02006000 {
65 compatible = "img,pdc-intc";
82 * An SoC peripheral that is wired through the PDC.
86 interrupt-parent = <&pdc>;
[all …]
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| /Documentation/devicetree/bindings/mailbox/ |
| D | brcm,iproc-pdc-mbox.txt | 1 The PDC driver manages data transfer to and from various offload engines
2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
3 one device tree entry per block. On some chips, the PDC functionality is
7 - compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
19 compatible = "brcm,iproc-pdc-mbox";
20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
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| /Documentation/devicetree/bindings/reset/ |
| D | qcom,pdc-global.yaml | 4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
7 title: Qualcomm PDC Global
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
21 - const: qcom,sc7180-pdc-global
22 - const: qcom,sdm845-pdc-global
26 - const: qcom,sc7280-pdc-global
30 - const: qcom,sdm845-pdc-global
48 compatible = "qcom,sdm845-pdc-global";
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| /Documentation/devicetree/bindings/watchdog/ |
| D | img,pdc-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/img,pdc-wdt.yaml#
7 title: ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT)
18 - img,pdc-wdt
50 compatible = "img,pdc-wdt";
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| /Documentation/devicetree/bindings/display/msm/ |
| D | gmu.yaml | 101 - description: GMU PDC registers
102 - description: GMU PDC sequence registers
134 - description: GMU PDC registers
170 - description: GMU PDC registers
171 - description: GMU PDC sequence registers
190 - description: GMU PDC registers
191 - description: GMU PDC sequence registers
238 - description: GMU PDC registers
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| /Documentation/devicetree/bindings/misc/ |
| D | atmel-ssc.txt | 5 - atmel,at91rm9200-ssc: support pdc transfer
31 - PDC transfer:
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,sc7280-adsp-pil.yaml | 64 - description: PDC AUDIO SYNC RESET
147 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
156 interrupts-extended = <&pdc 162 IRQ_TYPE_EDGE_RISING>,
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| D | qcom,sdm845-adsp-pil.yaml | 68 - description: PDC AUDIO SYNC RESET
125 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
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| D | qcom,sc7280-wpss-pil.yaml | 71 - description: PDC SYNC
162 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
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| D | qcom,sc7180-mss-pil.yaml | 87 - description: PDC reset
194 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
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| D | qcom,sc7280-mss-pil.yaml | 87 - description: PDC reset
212 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
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| D | qcom,sm6350-pas.yaml | 138 interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
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| D | qcom,sa8775p-pas.yaml | 129 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
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| D | qcom,msm8996-mss-pil.yaml | 86 - description: PDC reset (only valid for qcom,sdm845-mss-pil)
341 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
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| D | qcom,sm8350-pas.yaml | 154 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
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| D | qcom,sm8550-pas.yaml | 199 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
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| /Documentation/devicetree/bindings/serial/ |
| D | atmel,at91-usart.yaml | 78 description: use of PDC or DMA for receiving data
82 description: use of PDC or DMA for transmitting data
139 /* use PDC */
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,qdu1000-tlmm.yaml | 113 wakeup-parent = <&pdc>;
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| D | qcom,sm8250-pinctrl.yaml | 119 wakeup-parent = <&pdc>;
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| D | qcom,sc7180-pinctrl.yaml | 126 wakeup-parent = <&pdc>;
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| D | qcom,sm7150-tlmm.yaml | 125 wakeup-parent = <&pdc>;
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| D | qcom,sc7280-pinctrl.yaml | 122 wakeup-parent = <&pdc>;
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| D | qcom,sm8150-pinctrl.yaml | 128 wakeup-parent = <&pdc>;
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| /Documentation/devicetree/bindings/spmi/ |
| D | qcom,x1e80100-spmi-pmic-arb.yaml | 128 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
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